US5227650A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Charge coupled device delay line employing a floating gate or floating diffusion gate at its intermediate output portion
Assignee: Sony Corp
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Filing: 1992-01-23
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Granted: 1993-07-13
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Expires: 2012-01-23
Abstract
Abstract The present invention is to provide a CCD delay line in which a deterioration of a charge transfer efficiency can be reduced by maintaining a charge amount treated in a charge transfer section provided at the rear stage of an intermediate output section. According to an aspect of the present invention, in a charge transfer device having charge transfer sections of a plurality of stages consisting of electrode pairs of a transfer gate electrode and a storage gate electrode and at least one intermediate output section provided at the rear stage of a charge transfer section of a predetermined stage from the signal input side, a cross-sectional area of at least one of the transfer gate electrode and the storage gate electrode in the charge transfer section provided at the rear stage of the intermediate output section is selected to be larger than that in the charge transfer section provided at the front stage of the intermediate output section. Further, the impurity concentration in the region of a semiconductor substrate corresponding to the transfer gate electrode in the charge transfer section provided at the rear stage of the intermediate output section is selected to be lower than that in the charge transfer section provided at the front stage of the intermediate output section, thereby the potential barrier being increased.
Inventors
- 👤 Katsunori Noguchi
- 👤 Maki Sato
- 👤 Tadakuni Narabu
- 👤 Yasuhito Maki
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-08 05:32
CPC Classifications
H; H10; H10F; H10F39/00; H10F39/10; H10F39/12; H10F39/15; H10D; H10D44/00; H10D44/40; H10D44/45; H10D44/462; H10D44/454
Claims Analysis
Total Claims: 8
Claim 1
Independent Claim
162 words
A CCD delay line comprising: (a) a first set of charge transfer section consisting of a plurality of transfer electrodes and a plurality of storage electrodes provided on a CCD channel region through an insulating layer, in which a pair of transfer electrode and storage electrode form one delay stage; (b) a second set of charge transfer section consisting of a plurality of transfer electrodes and a plurality of storage electrodes provided on said CCD channel region through said insulating layer, in which a pair of transfer electrode and storage electrode form another delay stage; and (c) an intermediate output means provided between said first and second sets of charge transfer sections, wherein the cross-sectional area of one of the last pair of transfer electrode and storage electrode of said first set of charge transfer section is smaller than that of the same one of the first pair of transfer electrode and storage electrode of said second set of charge transfer section.
Claim 2
Dependent Claim
162 words
A CCD delay line comprising: (a) a first set of charge transfer section consisting of a plurality of transfer electrodes and a plurality of storage electrodes provided on a CCD channel region through an insulating layer, in which a pair of transfer electrode and storage electrode form one delay stage; (b) a second set of charge transfer section consisting of a plurality of transfer electrodes and a plurality of storage electrodes provided on said CCD channel region through said insulating layer, in which a pair of transfer electrode and storage electrode form another delay stage; and (c) an intermediate output means provided between said first and second sets of charge transfer sections, wherein the cross-sectional area of one of the last pair of transfer electrode and storage electrode of said first set of charge transfer section is smaller than that of the same one of the first pair of transfer electrode and storage electrode of said second set of charge transfer section.
Claim 3
Dependent Claim
63 words
A CCD delay line according to claim 1, in which the width in the charge transfer direction of one of the last pair of transfer electrode and storage electrode of said first set of charge transfer section is smaller than that of the same one of the first pair of transfer electrode and storage electrode of said second set of charge transfer section.
Claim 4
Dependent Claim
68 words
A CCD delay line according to claim 1, in which the width in quadrature direction with respect to the charge transfer direction of one of the last pair of transfer electrode and storage electrode of said first set of charge transfer section is smaller than that of the same one of the first pair of transfer electrode and storage electrode of said second set of charge transfer section.
Claim 5
Dependent Claim
168 words
A CCD delay line comprising: (1) a first set of charge transfer section consisting of a plurality of transfer electrodes and a plurality of storage electrodes provided on a CCD channel region through an insulating layer, in which a pair of transfer electrode and storage electrode form one delay stage; (2) a second set of charge transfer section consisting of a plurality of transfer electrodes and a plurality of storage electrodes provided on said CCD channel region through said insulating layer, in which a pair of transfer electrode and storage electrode form another delay stage; and (3) an intermediate output means provided between said first and second sets of charge transfer sections, wherein the impurity concentration of the CCD channel region corresponding to one of the last pair of transfer electrode and storage electrode of said first set of charge transfer section is higher than that of the same one of the first pair of transfer electrode and storage electrode of said second set of charge transfer section.
Claim 6
Dependent Claim
168 words
A CCD delay line comprising: (1) a first set of charge transfer section consisting of a plurality of transfer electrodes and a plurality of storage electrodes provided on a CCD channel region through an insulating layer, in which a pair of transfer electrode and storage electrode form one delay stage; (2) a second set of charge transfer section consisting of a plurality of transfer electrodes and a plurality of storage electrodes provided on said CCD channel region through said insulating layer, in which a pair of transfer electrode and storage electrode form another delay stage; and (3) an intermediate output means provided between said first and second sets of charge transfer sections, wherein the impurity concentration of the CCD channel region corresponding to one of the last pair of transfer electrode and storage electrode of said first set of charge transfer section is higher than that of the same one of the first pair of transfer electrode and storage electrode of said second set of charge transfer section.
Claim 7
Dependent Claim
22 words
A CCD delay line according to claim 1 or 2, in which said intermediate output means is formed in a floating-gate type.
Claim 8
Dependent Claim
22 words
A CCD delay line according to claim 1 or 2, in which said intermediate output means if formed in a floating-diffusion type.
References Cited (Backward Citations)
US4513431A
Cited
US4594604A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1996-07-12 | 1997-01-11 | 1997-07-13 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2000-07-12 | 2001-01-11 | 2001-07-13 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2004-07-12 | 2005-01-11 | 2005-07-13 | $7700.00 | Window Closed / Lapsed |