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US5221630A Expired / Lapsed US ⏱️ 0.0 years remaining

Method of manufacturing semiconductor device having a two layered structure gate electrode

Assignee: Renesas Electronics Corp
•
Filing: 1992-10-16
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Granted: 1993-06-22
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Expires: 2012-10-16
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Abstract

Abstract A semiconductor device not aggravated in transistor characteristic even when an impurity region is formed by ion implantation using a gate electrode as a mask, and a method of manufacturing thereof are disclosed. The semiconductor device includes a gate electrode 10 implemented by a polycrystal silicon layer 4 having the crystal orientation of the crystal grains thereof arranged in a predetermined orientation, and a single crystal silicon layer 5 formed on the polycrystal silicon layer 4 having a crystal orientation identical to that of the polycrystal silicon layer 4. The channelling phenomenon in which B + ions pass through to beneath the gate electrode 10 is prevented in forming an impurity region 6 by ion implantation to obtain a semiconductor device that does not have the characteristic of the formed transistor aggravated.

Inventors

  • 👤 Tohru Koyama
  • 👤 Katsuhiko Tamura
  • 👤 Yasuna Nakamura
  • 👤 Yoshiko Kokawa
  • 👤 Kenji Kusakabe

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-30 22:35
CPC Classifications
H; H10; H10D; H10D30/00; H10D30/01; H10D30/021; H10D30/0223; H10D64/00; H10D64/01; H10D64/013; H10D64/01302; H10D64/01304; H10D64/01306; H10D64/60; H10D64/66; H10D64/661; H10D64/662; H10P; H10P30/00; H10P30/20; H10P30/22; H10P30/222; Y; Y10; Y10S; Y10S438/00; Y10S438/942; Y10S438/945

Claims Analysis

Total Claims: 7
Claim 1
Independent Claim 114 words
A method of manufacturing a semiconductor device comprising the steps of: forming a polycrystal layer on a semiconductor substrate so that the crystal orientation of the crystal grains is arranged in a predetermined orientation, forming a single crystal layer on said polycrystal layer so that the crystal orientation of the crystal grains is identical to that of said polycrystal layer, forming a multilayer of a predetermined configuration by patterning said polycrystal layer and said single crystal layer, and forming an impurity region on said semiconductor substrate, by ion implantation at a direction tilted by a predetermined angle with respect to the crystal orientation of said single crystal layer using said multilayer as a mask.
Claim 2
Independent Claim 114 words
A method of manufacturing a semiconductor device comprising the steps of: forming a polycrystal layer on a semiconductor substrate so that the crystal orientation of the crystal grains is arranged in a predetermined orientation, forming a single crystal layer on said polycrystal layer so that the crystal orientation of the crystal grains is identical to that of said polycrystal layer, forming a multilayer of a predetermined configuration by patterning said polycrystal layer and said single crystal layer, and forming an impurity region on said semiconductor substrate, by ion implantation at a direction tilted by a predetermined angle with respect to the crystal orientation of said single crystal layer using said multilayer as a mask.
Claim 3
Dependent Claim 40 words
The method according to claim 1, wherein said step forming said polycrystal layer comprises the step of forming a polycrystal silicon layer, and said step forming said single crystal layer comprises the step of forming a single crystal silicon layer.
Claim 4
Dependent Claim 28 words
The method according to claim 2, wherein said step of forming said polycrystal silicon layer comprises the step of forming a polycrystal silicon layer by the CVD method.
Claim 5
Dependent Claim 47 words
The method according to claim 3, wherein said step of forming said polycrystal silicon layer comprises the step of forming a polycrystal silicon layer using silane type gas as reaction gas under the conditions of atmospheric pressure of 0.1-1.0 Torr, and atmospheric temperature of 550° C.-620° C.
Claim 6
Dependent Claim 29 words
The method according to claim 2, wherein said step of forming said single crystal silicon layer comprises the step of forming a single crystal silicon layer by epitaxial growth.
Claim 7
Dependent Claim 60 words
The method according to claim 2, wherein said step of forming said impurity region comprises the step of forming an impurity region on said semiconductor substrate by implanting ions at an angle of 7°-45° with respect to the crystallographic axis of said single crystal, when the crystal orientation of said single crystal silicon layer is at a plane orientation of.

References Cited (Backward Citations)

US4752589A Cited
US4808555A Cited
US4897368A Cited
US4902642A Cited
US4921812A Cited
JPH01220438A Cited
JPH02140933A Cited
US5155369A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1996-06-21 1996-12-21 1997-06-22 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2000-06-21 2000-12-21 2001-06-22 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2004-06-21 2004-12-21 2005-06-22 $7700.00 Window Closed / Lapsed

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