Matrix wiring substrate and active matrix display having non-linear resistance elements for electrostatic discharge protection

Claim 2

A matrix wiring substrate comprising an insulating substrate, a plurality of first level wirings provided on said insulating substrate, a plurality of second level wirings provided on said insulating substrate to intersect said first level wirings, an insulating layer provided between said first and second level wirings at least at a region where said first and second level wirings intersect each other, a common electrode connected in common to said first and second level wirings for preventing an electrostatic destruction of said insulating layer, said common electrode being located to extend along a periphery of said insulating substrate and to surround said first and second level wirings, a non-linear resistance means connected between each end of each of said first and second level wirings and said common electrode in such a manner that one end of each of said first and second level wirings is connected to said common electrode through an associated terminal and said non-linear resistance means in the named order, said non-linear resistance means being positioned at an outside of said associated terminal, said non-linear resistance means having a resistance non-linearly decreasing with an increase of an absolute value of a voltage applied across said non-linear resistance means, and checking pads each of which is connected to the other end of a corresponding one of said first and second level wirings, said non-linear resistance means being positioned outside of said checking pads.

Claim 3

A matrix wiring substrate claimed in claim 1 wherein said non-linear resistance means has a resistance not less than 1 GΩ when the voltage applied across said non-linear resistance means is not greater than 30 V, and has a resistance less than 1 GΩ when the voltage applied across said non-linear resistance means is not less than 60 V.

Claim 4

A matrix wiring substrate claimed in claim 1 wherein said non-linear resistance means includes a pair of diodes series-connected in such a manner that cathodes of the pair of diodes are connected to each other.

Claim 5

A matrix wiring substrate claimed in claim 3 wherein said pair of diodes are formed by a semiconductor layer and a pair of conductors formed in contact with said semiconductor layer and separated from each other, said pair of conductors being formed of a metal which forms a Schottky junction between said semiconductor layer and each of said pair of conductors.

Claim 6

A matrix wiring substrate claimed in claim 1 wherein said non-linear resistance means includes a pair of field effect transistors connected in such a manner that a gate and a drain of each of the field effect transistors are connected to each other, and the drain and a source of one of the field effect transistors are connected to a source and the drain of the other of the field effect transistors, respectively.

Claim 7

A matrix wiring substrate claimed in claim 1 further including a non-linear resistance means connected between said first and second level wirings, a non-linear resistance means connected between said first level wirings, and a non-linear resistance means connected between said second level wirings.

Claim 8

A matrix wiring substrate claimed in claim 6 wherein said non-linear resistance means has a resistance not less than 1 GΩ when the voltage applied across said non-linear resistance means is not greater than 30 V, and has a resistance less than 1 GΩ when the voltage applied across said non-linear resistance means is not less than 60 V.

Claim 9

An active matrix liquid crystal display comprising an insulating substrate, a number of pixel electrodes arranged in the form of a matrix on said insulating substrate, each of said pixel electrodes being associated with one switching means for individually driving the corresponding pixel electrode, a plurality of row lines formed from a first level conductor on said insulating substrate, each of said row lines extending along a corresponding row of the matrix, the switching means included in each one row being connected to a corresponding row line, a plurality of column lines formed from a second level conductor on said insulating substrate, each of said column lines extending along a corresponding column of the matrix and intersecting said plurality of row lines, the switching means included in each one column being connected to a corresponding column line, an insulating layer provided between said first and second level conductors for insulating said first and second level conductors from each other, a common electrode connected in common to said row lines and said column lines for preventing an electrostatic destruction of said insulating layer, said common electrode being located to extend along a periphery of said insulating substrate and to surround said row lines and said column lines, and a non-linear resistance means connected between said common electrode and each end of each of said row lines and said column lines in such a manner that one end of each of said row lines and said column lines is connected to said common electrode through an associated terminal and said non-linear resistance means in the named order, said non-linear resistance means being positioned at an outside of said associated terminal, said non-linear resistance means having a resistance non-linearly decreasing with an increase in an absolute value of a voltage applied across said non-linear resistance means, and checking pads each of which is connected to the other end of a corresponding one of said row lines and said column lines, said non-linear resistance means being positioned at an outside of said checking pads.

Claim 10

An active matrix liquid crystal display comprising an insulating substrate, a number of pixel electrodes arranged in the form of a matrix on said insulating substrate, each of said pixel electrodes being associated with one switching means for individually driving the corresponding pixel electrode, a plurality of row lines formed from a first level conductor on said insulating substrate, each of said row lines extending along a corresponding row of the matrix, the switching means included in each one row being connected to a corresponding row line, a plurality of column lines formed from a second level conductor on said insulating substrate, each of said column lines extending along a corresponding column of the matrix and intersecting said plurality of row lines, the switching means included in each one column being connected to a corresponding column line, an insulating layer provided between said first and second level conductors for insulating said first and second level conductors from each other, a common electrode connected in common to said row lines and said column lines for preventing an electrostatic destruction of said insulating layer, said common electrode being located to extend along a periphery of said insulating substrate and to surround said row lines and said column lines, and a non-linear resistance means connected between said common electrode and each end of each of said row lines and said column lines in such a manner that one end of each of said row lines and said column lines is connected to said common electrode through an associated terminal and said non-linear resistance means in the named order, said non-linear resistance means being positioned at an outside of said associated terminal, said non-linear resistance means having a resistance non-linearly decreasing with an increase in an absolute value of a voltage applied across said non-linear resistance means, and checking pads each of which is connected to the other end of a corresponding one of said row lines and said column lines, said non-linear resistance means being positioned at an outside of said checking pads.

Claim 11

An active matrix claimed in claim 8 wherein said non-linear resistance means includes a pair of diodes series-connected in such a manner that cathodes of the pair of diodes are connected to each other.

Claim 12

An active matrix claimed in claim 9 wherein said pair of diodes are formed by a semiconductor layer and a pair of conductors formed in contact with said semiconductor layer and separated from each other, said pair of conductors being formed of a metal which forms a Schottky junction between said semiconductor layer and each of said pair of conductors.

Claim 13

An active matrix claimed in claim 8 wherein said non-linear resistance means includes a pair of field effect transistors connected in such a manner that a gate and a drain of each of the field effect transistors are connected to each other, and the drain and a source of one of the field effect transistors are connected to a source and the drain of the other of the field effect transistors, respectively.

Claim 14

An active matrix claimed in claim 8 further including a non-linear resistance means connected between said row line and said column line at each corner of the matrix, a non-linear resistance means connected between each pair of adjacent row lines, and a non-linear resistance means connected between each pair of adjacent column lines.