US5218674A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Hardware bit block transfer operator in a graphics rendering processor
Assignee: Raytheon Co
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Filing: 1990-09-14
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Granted: 1993-06-08
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Expires: 2010-09-14
Abstract
Abstract A hardware bit block transfer operator for transferring blocks of data from a source address to a destination address in a display memory, a bit mapped memory, or a host processor, or between the two source and destination addresses in a graphics rendering cogenerator. Functionally, blocks to be transferred are addressable to the bit level thus requiring shifting and reformatting from the source word to the destination word alignment. The cogenerator automatically identifies all required boundary exceptions and applies the appropriate sequencing at the proper time during the block transfer operation. All that the programmer is required to provide are definitions of color depth, source transparency address, source start address, destination transparency address and destination window. The proper transfer is then performed by the cogenerator with a single command to the transfer operator.
Inventors
- 👤 John M. Peaslee
- 👤 Jeffrey C. Malacarne
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-26 02:51
CPC Classifications
G; G06; G06T; G06T15/00; G06T15/005; G06F; G06F9/00; G06F9/06; G06F9/30; G06F9/30003; G06F9/30007; G06F9/30032; G09; G09G; G09G5/00; G09G5/36; G09G2360/00; G09G2360/12; G09G2360/127; G09G5/39; G09G5/399
Claims Analysis
Total Claims: 10
Claim 1
Independent Claim
245 words
A bit block transfer operator for use in a graphics display system that moves rectangular blocks of image data from a source address space to a destination address space, and wherein the source and destination address space are located in a display memory, a bit mapped memory, or a host processor adapted to generate system commands, said graphics display system further including means for displaying the data stored in said bit mapped memory, said operator comprising: parameter generating means for precalculating parameters required to perform nondestructive movement of data from the source address space to the destination address space; coordinate generating means for generating source and destination addresses, boundary conditions and a scan direction for the respective source and destination spaces that are respectively indicative of an overlap between the source and destination address spaces and a direction in which to write the destination block to avoid destruction of the image data; command sequencer means coupled to said parameter generating means and said coordinate generating means for sequencing read and write commands to move said blocks of image data from said source address space to said destination address space; and data manipulation means coupled to said parameter generating means, said coordinate generating means and said command sequencer means for transferring said blocks of data from said source address and manipulating said blocks of data and then transferring said manipulated blocks of data to said destination address such that destruction of the image data is avoided.
Claim 2
Dependent Claim
245 words
A bit block transfer operator for use in a graphics display system that moves rectangular blocks of image data from a source address space to a destination address space, and wherein the source and destination address space are located in a display memory, a bit mapped memory, or a host processor adapted to generate system commands, said graphics display system further including means for displaying the data stored in said bit mapped memory, said operator comprising: parameter generating means for precalculating parameters required to perform nondestructive movement of data from the source address space to the destination address space; coordinate generating means for generating source and destination addresses, boundary conditions and a scan direction for the respective source and destination spaces that are respectively indicative of an overlap between the source and destination address spaces and a direction in which to write the destination block to avoid destruction of the image data; command sequencer means coupled to said parameter generating means and said coordinate generating means for sequencing read and write commands to move said blocks of image data from said source address space to said destination address space; and data manipulation means coupled to said parameter generating means, said coordinate generating means and said command sequencer means for transferring said blocks of data from said source address and manipulating said blocks of data and then transferring said manipulated blocks of data to said destination address such that destruction of the image data is avoided.
Claim 3
Dependent Claim
44 words
The transfer operator of claim 1 wherein coordinate generating means further comprises means for combining data from two separate source addresses spaces to form one destination address space and means for distributing data from one source address space to two separate destination address spaces.
Claim 4
Dependent Claim
16 words
The transfer operator of claim 1 wherein said data manipulation means comprises a 64-bit bidirectional bus.
Claim 5
Independent Claim
142 words
A method of transferring a rectangular block of data from a source address space to a destination address space, said method comprising the steps of: precalculating parameters required to perform nondestructive movement of a block of data from the source address space to the destination address space; generating source and destination addresses, boundary conditions and a scan direction for the respective source and destination spaces that are respectively indicative of an overlap between the source and destination address spaces and a direction in which to write the destination block to avoid destruction of the image data; retrieving a block of data to be operated on; manipulating the block of data to reconfigure the block of data in accordance with the parameters; transferring the manipulated, reconfigured block of data to the destination address space such that destruction of the image data is avoided.
Claim 6
Independent Claim
142 words
A method of transferring a rectangular block of data from a source address space to a destination address space, said method comprising the steps of: precalculating parameters required to perform nondestructive movement of a block of data from the source address space to the destination address space; generating source and destination addresses, boundary conditions and a scan direction for the respective source and destination spaces that are respectively indicative of an overlap between the source and destination address spaces and a direction in which to write the destination block to avoid destruction of the image data; retrieving a block of data to be operated on; manipulating the block of data to reconfigure the block of data in accordance with the parameters; transferring the manipulated, reconfigured block of data to the destination address space such that destruction of the image data is avoided.
Claim 7
Dependent Claim
43 words
The method of claim 4 wherein the step of manipulating the block of data to reconfigure the block of data in accordance with the parameters comprises the steps of: storing the block of data; and shifting the data in accordance with the parameters.
Claim 8
Dependent Claim
225 words
A bit block transfer operator for use in a graphics display system that moves rectangular blocks of image data from a source address space to a destination address space, and wherein the source and destination address spaces are located in a display memory, a bit mapped memory, or a host processor adapted to generate system commands, said graphics display system further including means for displaying the data stored in said bit mapped memory, said operator comprising: parameter generating means for precalculating parameters required to perform nondestructive movement of data from the source address space to the destination address space; coordinate generating means for generating source and destination addresses, and for combining data from two separate source addresses spaces to form one destination address space and means for distributing data from one source address space to two separate destination address spaces; command sequencer means coupled to said parameter generating means and said coordinate generating means for sequencing read and write commands to move said blocks of data from said source address space to said destination address space; and data manipulation means coupled to said parameter generating means, said coordinate generating means and said command sequencer means for transferring said blocks of data from said source address space and manipulating said blocks of data and then transferring said manipulated blocks of data to said destination address space.
Claim 9
Dependent Claim
225 words
A bit block transfer operator for use in a graphics display system that moves rectangular blocks of image data from a source address space to a destination address space, and wherein the source and destination address spaces are located in a display memory, a bit mapped memory, or a host processor adapted to generate system commands, said graphics display system further including means for displaying the data stored in said bit mapped memory, said operator comprising: parameter generating means for precalculating parameters required to perform nondestructive movement of data from the source address space to the destination address space; coordinate generating means for generating source and destination addresses, and for combining data from two separate source addresses spaces to form one destination address space and means for distributing data from one source address space to two separate destination address spaces; command sequencer means coupled to said parameter generating means and said coordinate generating means for sequencing read and write commands to move said blocks of data from said source address space to said destination address space; and data manipulation means coupled to said parameter generating means, said coordinate generating means and said command sequencer means for transferring said blocks of data from said source address space and manipulating said blocks of data and then transferring said manipulated blocks of data to said destination address space.
Claim 10
Dependent Claim
16 words
The transfer operator of claim 6 wherein said data manipulation means comprises a 64-bit bidirectional bus.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1996-06-07 | 1996-12-07 | 1997-06-08 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2000-06-07 | 2000-12-07 | 2001-06-08 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2004-06-07 | 2004-12-07 | 2005-06-08 | $7700.00 | Window Closed / Lapsed |