Electro-optical device

Claim 2

An electro-optical device comprising: a pair of substrates; an electro-optical modulating layer provided between said substrates; a column control line provided on one of said substrates; two row control lines R 1 and R 2 provided on said one of said substrates; an electrode provided on said one of said substrates between said two row control lines; a first p-channel transistor P 1 and a first n-channel transistor N 1 which are provided on said one of said substrates and connected to said column control line at gate terminals of the transistors P 1 and N 1 , and to said electrode at one of source and drain terminals of said first p-channel transistor P 1 and at one of source and drain terminals of said first n-channel transistor N 1 ; a second p-channel transistor P 2 provided on said one of said substrates and connected to the row control line R 1 at one of source and drain terminals of the transistor P 2 , to the row control line R 2 at a gate terminal of the transistor P 2 , and to the other one of the source and drain terminals of said first n-channel transistor N 1 at the other one of the source and drain terminals of said second p-channel transistor P 2 ; and a second n-channel transistor N 2 provided on said one of said substrates and connected to the row control line R 2 at one of source and drain terminals of the transistor N 2 , to the row control line R 1 at a gate terminal of the transistor N 2 , and to the other one of the source and drain terminals of said first p-channel transistor P 1 at the other one of the source and drain terminals of said second n-channel transistor N 2 .

Claim 3

The device of claim 1 wherein said electro-optical modulating layer comprises a liquid crystal selected from the group consisting of a twisted nematic liquid crystal, ferroelectric liquid crystal, a guest-host type liquid crystal and a phase transition type liquid crystal.

Claim 4

The device of claim 1 wherein channels of the transistors comprise a semi-amorphous silicon.

Claim 5

The device of claim 1 wherein said electro-optical modulating layer comprises a transparent solid substance and a liquid crystal.

Claim 6

The device of claim 1 further comprising an electrode provided on the other one of said substrates.

Claim 7

The device of claim 1 wherein the other one of the source and drain terminals of said first n-channel transistor N 1 is connected to the other one of the source and drain terminals of said second p-channel transistor P 2 through a diffused layer.

Claim 8

The device of claim 1 wherein said electro-optical modulating layer comprises a color pigment particle and an organic solvent.

Claim 9

An electro-optical device comprising: a pair of substrates; an electro-optical modulating layer provided between said substrates; pixels A mn (1≦m≦s; 1≦n≦t; and s, t, m, and n are natural numbers) arranged in a matrix of s×t on one of said substrates, the pixels A m1 , A m2 , . . . , A mt being arranged on an mth row, and the pixels A 1n , A 2n , . . . , A sn being arranged on an nth column; row control lines R 1 , R 2 , . . . , R s+1 provided on said one of said substrates, the row control line R m being provided on the mth row, and the row control line R s+1 being provided on an (s+1)th row; and column control lines C 1 , C 2 , . . . , C t provided on said one of said substrates, the column control line C n being provided on the nth column, the pixel A XY (1≦X≦s-1, 1≦Y≦t) comprising: an electrode E XY provided on said one of said substrates; a p-channel transistor P XY1 and an n-channel transistor N XY1 which are provided on said one of said substrates and connected to the column control line C Y at gate terminals of the transistors P XY1 and N XY1 , and to said electrode E XY at one of source and drain terminals of the transistor P XY1 and at one of source and drain terminals of the transistor N XY1 ; a p-channel transistor P XY2 provided on said one of said substrates and connected to the row control line R X at one of source and drain terminals of the transistor P XY2 , to the row control line R X+1 at a gate terminal of the transistor P XY2 , and to the other one of the source and drain terminals of the transistor N XY1 at the other one of the source and drain terminals of the transistor P XY2 ; and an n-channel transistor N XY2 provided on said one of said substrates and connected to the row control line R X+1 at one of source and drain terminals of the transistor N XY2 , to the row control line R X at a gate terminal of the transistor N XY2 , and to the other one of the source and drain terminals of the transistor P XY1 at the other one of the source and drain terminals of the transistor N XY2 , and the pixel A.sub.(X+1)Y comprising: an electrode E.sub.(X+1)Y provided on said one of said substrates; a p-channel transistor P.sub.(X+1)Y1 and an n-channel transistor N.sub.(X+1)Y1 which are provided on said one of said substrates and connected to the column control line C Y at gate terminals of the transistors P.sub.(X+1)Y1 and N.sub.(X+1)Y1, and to said electrode E.sub.(X+1)Y at one of source and drain terminals of the transistor P.sub.(X+1)Y1 and at one of source and drain terminals of the transistor N.sub.(X+1)Y1 ; a p-channel transistor P.sub.(X+1)Y2 provided on said one of said substrates and connected to the row control line R X+1 at one of source and drain terminals of the transistor P.sub.(X+1)Y2, to the row control line R X+2 at a gate terminal of the transistor P.sub.(X+1)Y2, and to the other one of the source and drain terminals of the transistor N.sub.(X+1)Y1 at the other one of the source and drain terminals of the transistor P.sub.(X+1)Y2 ; and an n-channel transistor N.sub.(X+1)Y2 provided on said one of said substrates and connected to the row control line R X+2 at one of source and drain terminals of the transistor N.sub.(X+1)Y2, to the row control line R X+1 at a gate terminal of the transistor N.sub.(X+1)Y2, and to the other one of the source and drain terminals of the transistor P.sub.(X+1)Y1 at the other one of the source and drain terminals of the transistor N.sub.(X+1)Y2.

Claim 10

An electro-optical device comprising: a pair of substrates; an electro-optical modulating layer provided between said substrates; pixels A mn (1≦m≦s; 1≦n≦t; and s, t, m, and n are natural numbers) arranged in a matrix of s×t on one of said substrates, the pixels A m1 , A m2 , . . . , A mt being arranged on an mth row, and the pixels A 1n , A 2n , . . . , A sn being arranged on an nth column; row control lines R 1 , R 2 , . . . , R s+1 provided on said one of said substrates, the row control line R m being provided on the mth row, and the row control line R s+1 being provided on an (s+1)th row; and column control lines C 1 , C 2 , . . . , C t provided on said one of said substrates, the column control line C n being provided on the nth column, the pixel A XY (1≦X≦s-1, 1≦Y≦t) comprising: an electrode E XY provided on said one of said substrates; a p-channel transistor P XY1 and an n-channel transistor N XY1 which are provided on said one of said substrates and connected to the column control line C Y at gate terminals of the transistors P XY1 and N XY1 , and to said electrode E XY at one of source and drain terminals of the transistor P XY1 and at one of source and drain terminals of the transistor N XY1 ; a p-channel transistor P XY2 provided on said one of said substrates and connected to the row control line R X at one of source and drain terminals of the transistor P XY2 , to the row control line R X+1 at a gate terminal of the transistor P XY2 , and to the other one of the source and drain terminals of the transistor N XY1 at the other one of the source and drain terminals of the transistor P XY2 ; and an n-channel transistor N XY2 provided on said one of said substrates and connected to the row control line R X+1 at one of source and drain terminals of the transistor N XY2 , to the row control line R X at a gate terminal of the transistor N XY2 , and to the other one of the source and drain terminals of the transistor P XY1 at the other one of the source and drain terminals of the transistor N XY2 , and the pixel A.sub.(X+1)Y comprising: an electrode E.sub.(X+1)Y provided on said one of said substrates; a p-channel transistor P.sub.(X+1)Y1 and an n-channel transistor N.sub.(X+1)Y1 which are provided on said one of said substrates and connected to the column control line C Y at gate terminals of the transistors P.sub.(X+1)Y1 and N.sub.(X+1)Y1, and to said electrode E.sub.(X+1)Y at one of source and drain terminals of the transistor P.sub.(X+1)Y1 and at one of source and drain terminals of the transistor N.sub.(X+1)Y1 ; a p-channel transistor P.sub.(X+1)Y2 provided on said one of said substrates and connected to the row control line R X+1 at one of source and drain terminals of the transistor P.sub.(X+1)Y2, to the row control line R X+2 at a gate terminal of the transistor P.sub.(X+1)Y2, and to the other one of the source and drain terminals of the transistor N.sub.(X+1)Y1 at the other one of the source and drain terminals of the transistor P.sub.(X+1)Y2 ; and an n-channel transistor N.sub.(X+1)Y2 provided on said one of said substrates and connected to the row control line R X+2 at one of source and drain terminals of the transistor N.sub.(X+1)Y2, to the row control line R X+1 at a gate terminal of the transistor N.sub.(X+1)Y2, and to the other one of the source and drain terminals of the transistor P.sub.(X+1)Y1 at the other one of the source and drain terminals of the transistor N.sub.(X+1)Y2.

Claim 11

An electro-optical device comprising: a pair of substrates; an electro-optical modulating layer provided between said substrates; a column control line provided on one of said substrates; two row control lines R 1 and R 2 provided on said one of said substrates; an electrode provided on said one of said substrates between said two row control lines; two first p-channel transistors P 1 and P 11 and two first n-channel transistors N 1 and N 11 which are provided on said one of said substrates and connected to said column control line at gate terminals of the transistors P 1 , P 11 , N 1 , and N 11 , and to said electrode at one of source and drain terminals of each of said two first p-channel transistors P 1 and P 11 and at one of source and drain terminals of each of said two first n-channel transistors N 1 and N 11 ; two second p-channel transistors P 2 and P 22 which are provided on said one of said substrates and connected to the row control line R 1 at one of source and drain terminals of each of said two second p-channel transistors P 2 and P 22 , to the row control line R 2 at gate terminals of the transistors P 2 and P 22 , and to the other one of the source and drain terminals of each of said two first n-channel transistors N 1 and N 11 at the other one of the source and drain terminals of corresponding one of said two second p-channel transistors P 2 and P 22 ; and two second n-channel transistors N 2 and N 22 which are provided on said one of said substrates and connected to the row control line R 2 at one of source and drain terminals of each of said two second n-channel transistors N 2 and N 22 , to the row control line R 1 at gate terminals of the transistors N 2 and N 22 , and to the other one of the source and drain terminals of each of said two first p-channel transistors P 1 and P 11 at the other one of the source and drain terminals of corresponding one of said two second n-channel transistors N 2 and N 22 .

Claim 12

An electro-optical device comprising: a pair of substrates; an electro-optical modulating layer provided between said substrates; a column control line provided on one of said substrates; two row control lines R 1 and R 2 provided on said one of said substrates; an electrode provided on said one of said substrates between said two row control lines; two first p-channel transistors P 1 and P 11 and two first n-channel transistors N 1 and N 11 which are provided on said one of said substrates and connected to said column control line at gate terminals of the transistors P 1 , P 11 , N 1 , and N 11 , and to said electrode at one of source and drain terminals of each of said two first p-channel transistors P 1 and P 11 and at one of source and drain terminals of each of said two first n-channel transistors N 1 and N 11 ; two second p-channel transistors P 2 and P 22 which are provided on said one of said substrates and connected to the row control line R 1 at one of source and drain terminals of each of said two second p-channel transistors P 2 and P 22 , to the row control line R 2 at gate terminals of the transistors P 2 and P 22 , and to the other one of the source and drain terminals of each of said two first n-channel transistors N 1 and N 11 at the other one of the source and drain terminals of corresponding one of said two second p-channel transistors P 2 and P 22 ; and two second n-channel transistors N 2 and N 22 which are provided on said one of said substrates and connected to the row control line R 2 at one of source and drain terminals of each of said two second n-channel transistors N 2 and N 22 , to the row control line R 1 at gate terminals of the transistors N 2 and N 22 , and to the other one of the source and drain terminals of each of said two first p-channel transistors P 1 and P 11 at the other one of the source and drain terminals of corresponding one of said two second n-channel transistors N 2 and N 22 .

Claim 13

The device of claim 9 wherein said electro-optical modulating layer comprises a liquid crystal selected from the group consisting of a twisted nematic liquid crystal, ferroelectric liquid crystal, a guest-host type liquid crystal and a phase transition type liquid crystal.

Claim 14

The device of claim 9 wherein channels of the transistors comprise a semi-amorphous silicon.

Claim 15

The device of claim 9 wherein said electro-optical modulating layer comprises a transparent solid substance and a liquid crystal.

Claim 16

The device of claim 9 further comprising an electrode provided on the other one of said substrates.

Claim 17

The device of claim 9 wherein said electro-optical modulating layer comprises a color pigment particle and an organic solvent.

Claim 18

An electro-optical device comprising: a pair of substrates; an electro-optical modulating layer provided between said substrates; a column control line provided on one of said substrates; two row control lines R 1 and R 2 provided on said one of said substrates; two electrodes provided on said one of said substrates between said two row control lines R 1 and R 2 ; a first p-channel transistor P 1 and a first n-channel transistor N 1 provided on said one of said substrates and connected to said column control line at gate terminals of the transistors P 1 and N 1 , and to one of said two electrodes at one of source and drain terminals of said first p-channel transistor P 1 and at one of source and drain terminals of said first n-channel transistor N 1 ; a second p-channel transistor P 2 provided on said one of said substrates and connected to the row control line R 1 at one of source and drain terminals of the transistor P 2 , to the row control line R 2 at a gate terminal of the transistor P 2 , and to the other one of the source and drain terminals of said first n-channel transistor N 1 at the other one of the source and drain terminals of said second p-channel transistor P 2 ; a second n-channel transistor N 2 provided on said one of said substrates and connected to the row control line R 2 at one of source and drain terminals of the transistor N 2 , to the row control line R 1 at a gate terminal of the transistor N 2 , and to the other one of the source and drain terminals of said first p-channel transistor P 1 at the other one of the source and drain terminals of said second n-channel transistor N 2 ; a third p-channel transistor P 3 and a third n-channel transistor N 3 which are provided on said one of said substrates and connected to said column control line at gate terminals of the transistors P 3 and N 3 , and to the other one of said two electrodes at one of source and drain terminals of said third p-channel transistor P 3 and at one of source and drain terminals of said third n-channel transistor N 3 ; a fourth p-channel transistor P 4 provided on said one of said substrates and connected to the row control line R 1 at one of source and drain terminals of the transistor P 4 , to the row control line R 2 at a gate terminal of the transistor P 4 , and to the other one of the source and drain terminals of said third n-channel transistor N 3 at the other one of the source and drain terminals of said fourth p-channel transistor P 4 ; and a fourth n-channel transistor N 4 provided on said one of said substrates and connected to the row control line R 2 at one of source and drain terminals of the transistor N 4 , to the row control line R 1 at a gate terminal of the transistor N 4 , and to the other one of the source and drain terminals of said third p-channel transistor P 3 at the other one of the source and drain terminals of said fourth n-channel transistor N 4 .

Claim 19

An electro-optical device comprising: a pair of substrates; an electro-optical modulating layer provided between said substrates; a column control line provided on one of said substrates; two row control lines R 1 and R 2 provided on said one of said substrates; two electrodes provided on said one of said substrates between said two row control lines R 1 and R 2 ; a first p-channel transistor P 1 and a first n-channel transistor N 1 provided on said one of said substrates and connected to said column control line at gate terminals of the transistors P 1 and N 1 , and to one of said two electrodes at one of source and drain terminals of said first p-channel transistor P 1 and at one of source and drain terminals of said first n-channel transistor N 1 ; a second p-channel transistor P 2 provided on said one of said substrates and connected to the row control line R 1 at one of source and drain terminals of the transistor P 2 , to the row control line R 2 at a gate terminal of the transistor P 2 , and to the other one of the source and drain terminals of said first n-channel transistor N 1 at the other one of the source and drain terminals of said second p-channel transistor P 2 ; a second n-channel transistor N 2 provided on said one of said substrates and connected to the row control line R 2 at one of source and drain terminals of the transistor N 2 , to the row control line R 1 at a gate terminal of the transistor N 2 , and to the other one of the source and drain terminals of said first p-channel transistor P 1 at the other one of the source and drain terminals of said second n-channel transistor N 2 ; a third p-channel transistor P 3 and a third n-channel transistor N 3 which are provided on said one of said substrates and connected to said column control line at gate terminals of the transistors P 3 and N 3 , and to the other one of said two electrodes at one of source and drain terminals of said third p-channel transistor P 3 and at one of source and drain terminals of said third n-channel transistor N 3 ; a fourth p-channel transistor P 4 provided on said one of said substrates and connected to the row control line R 1 at one of source and drain terminals of the transistor P 4 , to the row control line R 2 at a gate terminal of the transistor P 4 , and to the other one of the source and drain terminals of said third n-channel transistor N 3 at the other one of the source and drain terminals of said fourth p-channel transistor P 4 ; and a fourth n-channel transistor N 4 provided on said one of said substrates and connected to the row control line R 2 at one of source and drain terminals of the transistor N 4 , to the row control line R 1 at a gate terminal of the transistor N 4 , and to the other one of the source and drain terminals of said third p-channel transistor P 3 at the other one of the source and drain terminals of said fourth n-channel transistor N 4 .

Claim 20

The device of claim 15 wherein said electro-optical modulating layer comprises a liquid crystal selected from the group consisting of a twisted nematic liquid crystal, ferroelectric liquid crystal, a guest-host type liquid crystal and a phase transition type liquid crystal.

Claim 21

The device of claim 15 wherein channels of the transistors comprise a semi-amorphous silicon.

Claim 22

The device of claim 15 wherein said electro-optical modulating layer comprises a transparent solid substance and a liquid crystal.

Claim 23

The device of claim 15 further comprising an electrode provided on the other one of said substrates.

Claim 24

The device of claim 15 wherein said electro-optical modulating layer comprises a color pigment particle and an organic solvent.