US5216537A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Architecture and process for integrating DMD with control circuit substrates
Assignee: Texas Instruments Inc
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Filing: 1992-01-02
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Granted: 1993-06-01
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Expires: 2012-01-02
Abstract
Abstract DMD projection light values for HDTV have various manufacturing requirements, including the high yield integration of the DMD superstructure on top of an underlying CMOS address circuit. The CMOS chip surface contains several processing artifacts that can lead to reduced yield for the DMD superstructure. A modified DMD architecture and process are disclosed that minimizes the yield losses caused by these CMOS artifacts while also reducing parasitic coupling of the high voltage reset pulses to the underlying CMOS address circuitry.
Inventors
- 👤 Larry J. Hornbeck
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-01 13:27
CPC Classifications
G; G02; G02B; G02B26/00; G02B26/08; G02B26/0816; G02B26/0833; G02B26/0841; H; H10; H10P; H10P14/00; H10P14/60; H10P14/68; H10P14/683; Y; Y02; Y02P; Y02P80/00; Y02P80/30
Claims Analysis
Total Claims: 11
Claim 1
Independent Claim
129 words
A method of forming a spatial light modulator comprising: a. forming a first spacer layer over a substrate; b. patterning said first spacer layer; c. forming at least one electrode support post at a location where said first spacer layer has been patterned; d. forming at least one electrode over said first spacer layer and said electrode support post; e. forming a second spacer layer over said electrode; f. patterning said second spacer layer; g. forming at least one beam support post at a location where said second spacer layer has been patterned; h. forming at least one electrostatically deflectable element, each having a beam and at least one hinge, over said second spacer layer and said beam support post; and i. removing said first and second spacer layers.
Claim 2
Independent Claim
129 words
A method of forming a spatial light modulator comprising: a. forming a first spacer layer over a substrate; b. patterning said first spacer layer; c. forming at least one electrode support post at a location where said first spacer layer has been patterned; d. forming at least one electrode over said first spacer layer and said electrode support post; e. forming a second spacer layer over said electrode; f. patterning said second spacer layer; g. forming at least one beam support post at a location where said second spacer layer has been patterned; h. forming at least one electrostatically deflectable element, each having a beam and at least one hinge, over said second spacer layer and said beam support post; and i. removing said first and second spacer layers.
Claim 3
Dependent Claim
11 words
The method of claim 1, wherein said substrate contains address circuitry.
Claim 4
Dependent Claim
12 words
The method of claim 1, wherein said substrate is a CMOS substrate.
Claim 5
Dependent Claim
19 words
The method of claim 1, wherein said electrostatically deflectable element is deflected by a voltage applied to said electrode.
Claim 6
Dependent Claim
38 words
The method of claim 1, wherein air gaps are formed between portions of said substrate and said electrode and between portions of said electrode and said electrostatically deflectable element when said first and second spacer layers are removed.
Claim 7
Dependent Claim
13 words
The method of claim 1, wherein said spatial light modulator is a DMD.
Claim 8
Dependent Claim
17 words
The method of claim 1, wherein said electrode support post and said electrode are formed essentially simultaneously.
Claim 9
Dependent Claim
14 words
The method of claim 1, wherein said electrode support post is formed from metal.
Claim 10
Dependent Claim
12 words
The method of claim 1, wherein said electrode is formed from metal.
Claim 11
Dependent Claim
19 words
The method of claim 1, wherein said beam support post and said electrostatically deflectable element are formed essentially simultaneously.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1996-05-31 | 1996-11-30 | 1997-06-01 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2000-05-31 | 2000-11-30 | 2001-06-01 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2004-05-31 | 2004-11-30 | 2005-06-01 | $7700.00 | Window Closed / Lapsed |