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Pattern forming method

Assignee: Panasonic Holdings Corp
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Filing: 1991-11-26
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Granted: 1993-05-25
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Expires: 2011-11-26
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Abstract

Abstract In the case of manufacturing a dynamic memory of 256 MGbits or more according to a batch transfer process using a beam of electrons or a beam of charged particles, although the central resist pattern does not suffer from the insufficient exposure due to contribution of backscattered electrons from the surroundings to the resist exposure, but the peripheral resist pattern suffers from the insufficient exposure due to the proximity effect resulting from reduced backscattering of electrons during the exposure process. To cope with this, aperture portions of a mask for the peripheral resist pattern are corrected beforehand so as to make correction for the proximity effect of electrons on the peripheral resist pattern.

Inventors

  • 👤 Yoshihiko Hirai
  • 👤 Kazuhiko Hashimoto
  • 👤 Takahiro Matuso

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-08 13:44
CPC Classifications
B; B82; B82Y; B82Y10/00; G; G03; G03F; G03F1/00; G03F1/20; B82Y40/00; H; H01; H01J; H01J37/00; H01J37/30; H01J37/302; H01J37/3023; H01J37/3026; H01J37/317; H01J37/3174

Claims Analysis

Total Claims: 5
Claim 1
Independent Claim 121 words
A pattern forming method of exposing a semiconductor substrate by an exposure technique that is subject to a proximity effect, so as to form on said semiconductor substrate at least one electronic chip comprising a plurality of regions including at least one center region and a plurality of peripheral regions surrounding said center region, said method comprising the steps of: exposing said substrate through a basic mask having apertures and having a basic size so as to form said at least one center region; and exposing said substrate through a plurality of correction masks having apertures and having sizes that are corrected with respect to said basic size for said proximity effect so as to form said plurality of peripheral regions.
Claim 2
Dependent Claim 121 words
A pattern forming method of exposing a semiconductor substrate by an exposure technique that is subject to a proximity effect, so as to form on said semiconductor substrate at least one electronic chip comprising a plurality of regions including at least one center region and a plurality of peripheral regions surrounding said center region, said method comprising the steps of: exposing said substrate through a basic mask having apertures and having a basic size so as to form said at least one center region; and exposing said substrate through a plurality of correction masks having apertures and having sizes that are corrected with respect to said basic size for said proximity effect so as to form said plurality of peripheral regions.
Claim 3
Dependent Claim 44 words
A pattern forming method according to claim 1, wherein said exposure technique comprises a step of exposing said semiconductor substrate to a beam of charged particles, and wherein a resist is deposited on said substrate to be exposed to said beam of charged particles.
Claim 4
Dependent Claim 39 words
A pattern forming method according to claim 1, wherein said basic mask has a periphery and is integrally formed with said plurality of correction masks, said plurality of correction masks being adjacent to said periphery of said basic mask.
Claim 5
Dependent Claim 30 words
A pattern forming method according to claim 3, wherein said apertures in said correction masks have sizes that increase in a direction outward from said periphery of said basic mask.

References Cited (Backward Citations)

US5036209A Cited
US5099133A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1996-05-24 1996-11-23 1997-05-25 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2000-05-24 2000-11-23 2001-05-25 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2004-05-24 2004-11-23 2005-05-25 $7700.00 Window Closed / Lapsed

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