Abstract An FM intermediate-frequency circuit into which there is integrated at least a limiter-amplifier (1A), a level detector included in the amplifier, and a phase-locked loop (2, 3, 4) which contains a VCO (4). A large dynamic range of the level detector is obtained without having to use excessive limiter-amplifier amplification, which would cause oscillation problems. In parallel with the said limiter-amplifier (1A) is at least a second limiter-amplifier (1B), in connection with which there is also a level detector. By means of a dividing circuit (R1, R2) the level of the input signal of the second limiter-amplifier (1B) is dropped. The signals (1A, 1B) obtained from the level detectors are combined to form one level detection signal (ITOT). If the signals are in the form of current, the combining can be carried out directly by summating the signals.
An FM intermediate-frequency circuit comprising a first limiter-amplifier (1A) having an internal level detector and a phase-locked loop having a VCO(4), characterized in that at least a second limiter-amplifier (1B) having an internal level detector is placed in parallel with the first limiter-amplifier, the first limiter-amplifier produces a first output signal (IA) in response to receipt of a first intermediate frequency signal; the second limiter-amplifier produces a second output signal (IB) in response to receipt of a second intermediate frequency signal; the second intermediate frequency signal level being reduced to a level below the first intermediate frequency level by a level-dividing circuit; and the first and second output signals being combined to form a level detection signal (ITOT).
Claim 2
Dependent Claim
118 words
An FM intermediate-frequency circuit comprising a first limiter-amplifier (1A) having an internal level detector and a phase-locked loop having a VCO(4), characterized in that at least a second limiter-amplifier (1B) having an internal level detector is placed in parallel with the first limiter-amplifier, the first limiter-amplifier produces a first output signal (IA) in response to receipt of a first intermediate frequency signal; the second limiter-amplifier produces a second output signal (IB) in response to receipt of a second intermediate frequency signal; the second intermediate frequency signal level being reduced to a level below the first intermediate frequency level by a level-dividing circuit; and the first and second output signals being combined to form a level detection signal (ITOT).
Claim 3
Dependent Claim
15 words
An intermediate-frequency circuit according to claim 1, wherein the level-dividing circuit comprises resistors (R1, R2).
Claim 4
Dependent Claim
40 words
An intermediate-frequency circuit according to claim 1, wherein the level-dividing circuit is calibrated so that the operating range of the second limiter-amplifier (1B) begins at that intermediate-frequency signal level at which the operating range of the first limiter-amplifier (1A) ends.
Claim 5
Dependent Claim
15 words
An intermediate-frequency circuit according to claim 3, wherein the level-dividing circuit comprises resistors (R1, R2).
Claim 6
Dependent Claim
21 words
An intermediate-frequency circuit according to claim 1, wherein the first and second limiter-amplifiers and the phase-locked loop form an integrated circuit.