US5212653A
Expired / Lapsed
US
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Method for producing a layout of element portions for a semiconductor integrated circuit using a computer
Assignee: Panasonic Holdings Corp
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Filing: 1991-02-21
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Granted: 1993-05-18
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Expires: 2011-02-21
Abstract
Abstract A method for producing layout comprises the steps of: producing power line and other blocks according to inputted circuit configuration data represent kind, attribute data and element to be included in the semiconductor integrated circuit; determining kind of element portions arranged at each of the blocks according to the total area of each kind of the element portion in each block; moving the different kind of element portion in each block to one of blocks including the same kind of element portion; and arranging the element portions according to the data of a horizontal position. For obtaining a vertical length of each block, a minimum lengths of resistor and capacitor blocks are inputted; then the actual vertical length of the transistor block is determined; and then final vertical lengths of resistor and capacitor blocks are determined. A resistor or capacitor is modified in its shape if it has large length than the determined vertical length. A resistor or capacitor with large area is made with full vertical length of the layout. Other components are arranged between full vertical length blocks.
Inventors
- 👤 Makoto Tanaka
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-28 07:59
CPC Classifications
G; G06; G06F; G06F30/00; G06F30/30; G06F30/39; H; H10; H10D; H10D89/00
Claims Analysis
Total Claims: 18
Claim 1
Independent Claim
220 words
A method for positioning circuit elements for a semiconductor integrated circuit on the basis of inputted circuit configuration data which represent kind, attribute data and location of each circuit element to be included in said semiconductor integrated circuit, using a computer, comprising the steps of: (a) positioning a plurality of blocks arranged side by side in one direction of the semiconductor integrated circuit such that one or more blocks includes circuit elements to be directly connected to a common line in said semiconductor integrated circuit; (b) obtaining a total area of each kind of circuit element in each of said blocks; (c) determining a kind of circuit element to be arranged in each of said blocks in accordance with said total area obtained in connection with said each kind; (d) detecting at least one circuit element different from the determined kind of said circuit element in each of said blocks if any; (e) transferring the detected different kind of circuit element from said each block to a block including the same kind of said circuit element arranged therein; and (f) for each of said blocks arranging said circuit elements determined after said step of transferring so that each circuit element is located at a suitable position in accordance with said location data of said circuit elements to produce said layout.
Claim 2
Independent Claim
220 words
A method for positioning circuit elements for a semiconductor integrated circuit on the basis of inputted circuit configuration data which represent kind, attribute data and location of each circuit element to be included in said semiconductor integrated circuit, using a computer, comprising the steps of: (a) positioning a plurality of blocks arranged side by side in one direction of the semiconductor integrated circuit such that one or more blocks includes circuit elements to be directly connected to a common line in said semiconductor integrated circuit; (b) obtaining a total area of each kind of circuit element in each of said blocks; (c) determining a kind of circuit element to be arranged in each of said blocks in accordance with said total area obtained in connection with said each kind; (d) detecting at least one circuit element different from the determined kind of said circuit element in each of said blocks if any; (e) transferring the detected different kind of circuit element from said each block to a block including the same kind of said circuit element arranged therein; and (f) for each of said blocks arranging said circuit elements determined after said step of transferring so that each circuit element is located at a suitable position in accordance with said location data of said circuit elements to produce said layout.
Claim 3
Dependent Claim
29 words
A method as claimed in claim 1, wherein said circuit elements comprise a resistor whose said attribute data includes resistance and a capacitor whose said attribute data includes capacitance.
Claim 4
Dependent Claim
47 words
A method as claimed in claim 1, further comprising the step of producing a layout image for positioning said circuit elements by replacing each circuit element arranged in step (f) with a predetermined pattern in accordance with kind and attribute data of said each in circuit element.
Claim 5
Dependent Claim
16 words
A method as claimed in claim 1, wherein said common line is a power source line.
Claim 6
Dependent Claim
72 words
A method as claimed in claim 1, comprising the further step of assigning circuit elements to said blocks such that a first block of said blocks includes circuit elements connected to a positive power source line, a second block of said blocks includes circuit elements connected to a negative power source line, and a third block of said blocks includes circuit elements not connected to said positive and negative power source lines.
Claim 7
Dependent Claim
19 words
A method as claimed in claim 1, wherein said circuit elements include resistor elements, capacitor elements, and transistor elements.
Claim 8
Dependent Claim
129 words
A method as claimed in claim 6, further comprising the steps of: (a) providing a minimum length of first blocks to which said resistor elements and said capacitor elements are assigned and providing a total length of said blocks; (b) determining a preliminary length of said first blocks; (c) determining a length of a second block of said blocks, to which said transistor elements are assigned, in accordance with the maximum length of said transistor elements determined by said kind and attribute data and by a difference between said total length of blocks and said length of said first blocks; and (d) determining a final length of said first blocks in accordance with a difference between the length of said second block and said total length of said blocks.
Claim 9
Dependent Claim
56 words
A method as claimed in claim 7, further comprising the step of: modifying a shape of one of said circuit elements when a vertical length of said one of said circuit elements obtained in accordance with said attribute data of said one of said elements exceeds said vertical length determined in step (d) of claim 7.
Claim 10
Independent Claim
348 words
A method for producing a layout of circuit elements for a semiconductor integrated circuit on the basis of inputted circuit configuration data which represent kind, attribute data and location of each circuit element to be included in said semiconductor integrated circuit, using a computer programmed to perform the steps of: (a) establishing a vertical length of said circuit elements in accordance with input circuit configuration data; (b) detecting a circuit element whose obtained vertical length exceeds a predetermined value; (c) producing a first block with full vertical length in response to detection of step (b); (d) forming a plurality of vertically extending sections of said circuit and defining a boundary between two consecutive sections in accordance with a horizontal position of said circuit element detected in step (b); (e) producing a set of second blocks for arranging said circuit elements belonging to said each section other than sections including said circuit element detected in step (b), and arranging said second blocks side by side in the vertical direction such that one or more blocks include circuit elements to be directly connected to a common line in said semiconductor integrated circuit; (f) obtaining a total area of each kind of circuit element in each of said blocks, and selecting an area of each circuit element in accordance with said kind of and said attribute data of said each circuit element; (g) determining a kind of circuit element to be arranged in each of said blocks in accordance with said total area obtained in connection with said each kind; (h) detecting at least one circuit element different from the determined kind of said circuit element in each of said blocks if any; (i) transferring the detected different kind of circuit element from said each block to a block including the same kind of said circuit element arranged therein; and (j) for each of said blocks arranging said circuit elements determined after said step of transferring so that each circuit element is located at a suitable position in accordance with said location data of said circuit elements to produce said layout.
Claim 11
Independent Claim
348 words
A method for producing a layout of circuit elements for a semiconductor integrated circuit on the basis of inputted circuit configuration data which represent kind, attribute data and location of each circuit element to be included in said semiconductor integrated circuit, using a computer programmed to perform the steps of: (a) establishing a vertical length of said circuit elements in accordance with input circuit configuration data; (b) detecting a circuit element whose obtained vertical length exceeds a predetermined value; (c) producing a first block with full vertical length in response to detection of step (b); (d) forming a plurality of vertically extending sections of said circuit and defining a boundary between two consecutive sections in accordance with a horizontal position of said circuit element detected in step (b); (e) producing a set of second blocks for arranging said circuit elements belonging to said each section other than sections including said circuit element detected in step (b), and arranging said second blocks side by side in the vertical direction such that one or more blocks include circuit elements to be directly connected to a common line in said semiconductor integrated circuit; (f) obtaining a total area of each kind of circuit element in each of said blocks, and selecting an area of each circuit element in accordance with said kind of and said attribute data of said each circuit element; (g) determining a kind of circuit element to be arranged in each of said blocks in accordance with said total area obtained in connection with said each kind; (h) detecting at least one circuit element different from the determined kind of said circuit element in each of said blocks if any; (i) transferring the detected different kind of circuit element from said each block to a block including the same kind of said circuit element arranged therein; and (j) for each of said blocks arranging said circuit elements determined after said step of transferring so that each circuit element is located at a suitable position in accordance with said location data of said circuit elements to produce said layout.
Claim 12
Dependent Claim
29 words
A method as claimed in claim 9, wherein said circuit elements comprise a resistor whose said attribute data includes resistance and a capacitor whose said attribute data includes capacitance.
Claim 13
Dependent Claim
47 words
A method as claimed in claim 9, further comprising the step of producing a layout image for positioning said circuit elements by replacing each circuit element arranged in step (i) with a predetermined pattern in accordance with kind and attribute data of said each in circuit element.
Claim 14
Dependent Claim
16 words
A method as claimed in claim 9, wherein said common line is a power source line.
Claim 15
Dependent Claim
72 words
A method as claimed in claim 9, comprising the further step of assigning circuit elements to said blocks such that a first block of said blocks includes circuit elements connected to a positive power source line, a second block of said blocks includes circuit elements connected to a negative power source line, and a third block of said blocks includes circuit elements not connected to said positive and negative power source lines.
Claim 16
Dependent Claim
19 words
A method as claimed in claim 9, wherein said circuit elements include resistor elements, capacitor elements, and transistor elements.
Claim 17
Dependent Claim
140 words
A method as claimed in claim 14, further comprising the steps of: (a) providing a minimum vertical length of first blocks of said blocks, to which said resistor elements and said capacitor elements are assigned and providing a total vertical length of said blocks; (b) determining a preliminary vertical length of said first blocks; (c) determining a vertical length of a second block of said blocks, to which said transistor elements are assigned, in accordance with the maximum vertical length of said transistor elements determined by said kind and attribute data and by a difference between said total vertical length of blocks and vertical length of said first blocks; and (d) determining a final vertical length of said first blocks in accordance with a difference between the vertical length of said second block and said total length of said blocks.
Claim 18
Dependent Claim
56 words
A method as claimed in claim 15, further comprising the step of: modifying a shape of one of said circuit elements when a vertical length of said one of said circuit elements obtained in accordance with said attribute data of said one of said elements exceeds said vertical length determined in step (d) of claim 15.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1996-05-17 | 1996-11-16 | 1997-05-18 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2000-05-17 | 2000-11-16 | 2001-05-18 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2004-05-17 | 2004-11-16 | 2005-05-18 | $7700.00 | Window Closed / Lapsed |