US5206943A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Disk array controller with parity capabilities
Assignee: Hewlett Packard Development Co LP
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Filing: 1989-11-03
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Granted: 1993-04-27
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Expires: 2009-11-03
Abstract
Abstract A disk array controller includes a local microprocessor, a bus master interface, a compatible interface, buffer memory and a disk interface. The controller includes a DMA controller between the microprocessor, the bus master interface, the compatibility interface and the buffer memory. DMA controllers are also provided between the disk interface and the buffer memory. One of these DMA channels includes an XOR engine used to develop parity information used with the disk array. The various DMA controllers are cycled to allow access to the buffer memory and the disk interface.
Inventors
- 👤 Ryan A. Callison
- 👤 Thomas W. Grieff
- 👤 Kenneth L. Bush
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-26 07:29
CPC Classifications
G; G06; G06F; G06F3/00; G06F3/06; G06F11/00; G06F11/07; G06F11/08; G06F11/10; G06F11/1076; G06F11/1008; G06F3/0601; G06F3/0668; G06F3/0671; G06F3/0673
Claims Analysis
Total Claims: 18
Claim 1
Independent Claim
201 words
A disk data controller in a computer system for transferring data with a plurality of individual disk drives forming a disk array in a computer system, comprising: buffer memory for storing data to be transferred to or transferred from the disk drives in the disk array; a plurality of means for controlling data to be transferred to or transferred from the disk drives in the disk array; means coupled to the disk array and said plurality of means for controlling data transfer with the disk drives for selecting which of said plurality of means for controlling data transfer with the disk drives may transfer data with the disk drives in the disk array and for passing said data between said selected means for controlling data transfer with the disk drives and the disk drives in the disk array; and means coupled to said buffer memory and said plurality of means for controlling data transfer with the disk drives for selecting which of said plurality of means for controlling data transfer with the disk drives may transfer data with said buffer memory and for passing data between said selected means for controlling data transfer with the disk drives and said buffer memory.
Claim 2
Dependent Claim
201 words
A disk data controller in a computer system for transferring data with a plurality of individual disk drives forming a disk array in a computer system, comprising: buffer memory for storing data to be transferred to or transferred from the disk drives in the disk array; a plurality of means for controlling data to be transferred to or transferred from the disk drives in the disk array; means coupled to the disk array and said plurality of means for controlling data transfer with the disk drives for selecting which of said plurality of means for controlling data transfer with the disk drives may transfer data with the disk drives in the disk array and for passing said data between said selected means for controlling data transfer with the disk drives and the disk drives in the disk array; and means coupled to said buffer memory and said plurality of means for controlling data transfer with the disk drives for selecting which of said plurality of means for controlling data transfer with the disk drives may transfer data with said buffer memory and for passing data between said selected means for controlling data transfer with the disk drives and said buffer memory.
Claim 3
Dependent Claim
40 words
The controller of claim 1, further comprising: a microprocessor coupled to said plurality of means for controlling data transfer with the disk drives for providing transfer information to said plurality of means for controlling data transfer with the disk drives.
Claim 4
Dependent Claim
74 words
The controller of claim 2, wherein said microprocessor is further coupled to said means for selecting which of said means for data transfer with the disk drives may transfer data with said buffer memory and wherein said means for selecting which of said means for data transfer with the disk drives may transfer data with said buffer memory includes said microprocessor in the selection of the means which transfer data with said buffer memory.
Claim 5
Dependent Claim
74 words
The controller of claim 2, wherein said microprocessor is further coupled to said means for selecting which of said means for data transfer with the disk drives may transfer data with the disk drives and wherein said means for selecting which of said means for data transfer with the disk drives may transfer data with the disk drives includes said microprocessor in the selection of the means which transfer data with the disk array.
Claim 6
Dependent Claim
74 words
The controller of claim 4, wherein said microprocessor is further coupled to said means for selecting which of said means for data transfer with the disk drives may transfer data with said buffer memory and wherein said means for selecting which of said means for data transfer with the disk drives may transfer data with said buffer memory includes said microprocessor in the selection of the means which transfer data with said buffer memory.
Claim 7
Dependent Claim
30 words
The controller of claim 5, wherein each of said plurality of means for controlling data transfer with the disk drives includes means for providing an address to said buffer memory.
Claim 8
Dependent Claim
36 words
The controller of claim 6, wherein said means for providing an address increments the address each time said means for controlling data transfer with the disk drives is selected to transfer data with said buffer memory.
Claim 9
Dependent Claim
29 words
The controller of claim 1, further comprising: means coupled to the computer system and to said buffer memory for transferring data between said buffer memory and the computer system.
Claim 10
Dependent Claim
55 words
The controller of claim 8, wherein said means for selecting which of said means for data transfer with the disk drives may transfer data with said buffer memory includes said means for transferring data between said buffer memory and the computer system in the selection of the means which transfer data with said buffer memory.
Claim 11
Dependent Claim
30 words
The controller of claim 1, wherein each of said plurality of means for controlling data transfer with the disk drives includes means for providing an address to said buffer memory.
Claim 12
Dependent Claim
36 words
The controller of claim 10, wherein said means for providing an address increments the address each time said means for controlling data transfer with the disk drives is selected to transfer data with said buffer memory.
Claim 13
Dependent Claim
42 words
The controller of claim 1, wherein one of said plurality of means for controlling data transfer with the disk drives includes means for developing parity data related to other data contained in said buffer memory to be transferred to the disk drives.
Claim 14
Dependent Claim
46 words
The controller of claim 12, wherein said means for controlling data transfer with the disk drives which includes said means for developing parity data further includes means for storing a plurality addresses of said buffer memory relating to said other data contained in said buffer memory.
Claim 15
Dependent Claim
36 words
The controller of claim 13, wherein said means for controlling data transfer with the disk drives which includes said means for developing parity data successively accesses said buffer memory at each of said plurality of addresses.
Claim 16
Dependent Claim
39 words
The controller of claim 14, wherein said means for controlling data transfer with the disk drives which includes said means for developing parity data performs an XOR operation on the data received from said buffer memory with each access.
Claim 17
Dependent Claim
47 words
The controller of claim 15, wherein said means for controlling data transfer with the disk drives which includes said means for developing parity data further includes means for providing the result of said XOR operation to said buffer memory at the last of said plurality of addresses.
Claim 18
Dependent Claim
38 words
The controller of claim 15, wherein said means for controlling data transfer with the disk drives which includes said means for developing parity data further includes means for indicating if the result of said XOR operation is zero.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1996-04-26 | 1996-10-26 | 1997-04-27 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2000-04-26 | 2000-10-26 | 2001-04-27 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2004-04-26 | 2004-10-26 | 2005-04-27 | $7700.00 | Window Closed / Lapsed |