US5200962A
Expired / Lapsed
US
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Data compression with error correction
Assignee: NEXTIRAONE LLC
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Filing: 1988-11-03
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Granted: 1993-04-06
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Expires: 2008-11-03
Abstract
Abstract A combined data compression/error correction system suitable for use in synchronous communication utilizes a data compressor to produce variable rate compressed data from synchronous data. The variable rate compressed data is applied to a FIFO memory which is monitored to determine when the amount of data in the FIFO drops below a predetermined threshold. When it drops below this threshold, an error correction code generator generates a separator character and an error correction code which is appended to the compressed data in the FIFO. Thus, the additional bandwidth created by data compression is used to provide enhancement to the data integrity by providing a variable level of error correction varying in accordance with the free bandwidth generated by the data compressor.
Inventors
- 👤 Ming-Luh Kao
- 👤 Jong-Keung Cheng
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-29 07:32
CPC Classifications
H; H04; H04L; H04L1/00; H04L1/004; H04L1/0056; H04L1/0057; H03; H03M; H03M13/00; H04L1/0064; H04L1/0065
Claims Analysis
Total Claims: 16
Claim 1
Independent Claim
159 words
A data communication apparatus, comprising in combination: receiving means for receiving a stream of data; compressing means for compressing said stream of data to produce compressed data, said compressed data requiring less bandwidth than said stream of data so that said compressing means produces free bandwidth; error correction means for generating error correction codes associated with said compressed data, said error correction codes occupying no more than said free bandwidth; combining means for combining said error correction codes with said compressed data so that at least a portion of said free bandwidth is utilized for enhancing the integrity of said compressed data by utilizing said free bandwidth to carry error correction codes; a First In First Out (FIFO) memory receiving said compressed data; means for determining when said FIFO contains less than a predetermined amount of data; and wherein said error correction means generates said error correction code when said FIFO contains less than said predetermined amount of data.
Claim 2
Dependent Claim
159 words
A data communication apparatus, comprising in combination: receiving means for receiving a stream of data; compressing means for compressing said stream of data to produce compressed data, said compressed data requiring less bandwidth than said stream of data so that said compressing means produces free bandwidth; error correction means for generating error correction codes associated with said compressed data, said error correction codes occupying no more than said free bandwidth; combining means for combining said error correction codes with said compressed data so that at least a portion of said free bandwidth is utilized for enhancing the integrity of said compressed data by utilizing said free bandwidth to carry error correction codes; a First In First Out (FIFO) memory receiving said compressed data; means for determining when said FIFO contains less than a predetermined amount of data; and wherein said error correction means generates said error correction code when said FIFO contains less than said predetermined amount of data.
Claim 3
Dependent Claim
24 words
The apparatus of claim 1, wherein said compressing means includes adaption means for adapting the compression according to characteristics of said stream of data.
Claim 4
Dependent Claim
34 words
The apparatus of claim 1, further comprising: means for generating a separator character; and wherein said combining means includes means for inserting said separator character between said compressed data and said error correction codes.
Claim 5
Dependent Claim
33 words
The apparatus of claim 1, wherein said error correction means includes means for generating a fixed number of error correction bits from a fixed number of compressed data bits at varying time intervals.
Claim 6
Dependent Claim
22 words
The apparatus of claim 1, further comprising: wherein said combining means includes means for loading said error correction code into said FIFO.
Claim 7
Dependent Claim
34 words
The apparatus of claim 5, further comprising: means for generating a separator character; and wherein said combining means includes means for inserting said separator character between said compressed data and said error correction codes.
Claim 8
Independent Claim
64 words
A method of processing variable rate data, comprising the steps of: monitoring a measure of an average rate of said data; generating an error correction code as a result of said average rate dropping below a predetermined threshold; appending said error correction code to said data; and generating a separator code and inserting a separator code between said data and said error correction code.
Claim 9
Independent Claim
64 words
A method of processing variable rate data, comprising the steps of: monitoring a measure of an average rate of said data; generating an error correction code as a result of said average rate dropping below a predetermined threshold; appending said error correction code to said data; and generating a separator code and inserting a separator code between said data and said error correction code.
Claim 10
Dependent Claim
33 words
The method of claim 7, wherein said error correction code is generated from a fixed number of data bits and wherein said error correction code is a fixed number of bits in length.
Claim 11
Dependent Claim
32 words
The method of claim 7, wherein said monotoring step includes loading said variable rate data into a First In First Out (FIFO) memory and examining the amount of data in said FIFO.
Claim 12
Dependent Claim
25 words
The method of claim 9, further comprising generating said error correction code when said amount of data in said FIFO drops below a predetermined threshold.
Claim 13
Independent Claim
144 words
A method of processing data, comprising the steps of: receiving an input stream of synchronous data at a predetermined data rate; compressing said synchronous data to produce a variable rate stream of compressed data, said variable rate stream of compressed data having on average fewer bits than said stream of synchronous data; generating error correction codes having an adequate number of bits to restore said compressed data to said predetermined data rate; combining said error correction codes with said variable rate compressed data to form an output stream of synchronous data comprising variable rate compressed data and error correction codes at said predetermined data rate; generating a fixed number of forward error correction bits from a fixed number of said data bits at varying intervals; and generating a separator character and placing said separator character between said data bits and said error correction bits.
Claim 14
Independent Claim
144 words
A method of processing data, comprising the steps of: receiving an input stream of synchronous data at a predetermined data rate; compressing said synchronous data to produce a variable rate stream of compressed data, said variable rate stream of compressed data having on average fewer bits than said stream of synchronous data; generating error correction codes having an adequate number of bits to restore said compressed data to said predetermined data rate; combining said error correction codes with said variable rate compressed data to form an output stream of synchronous data comprising variable rate compressed data and error correction codes at said predetermined data rate; generating a fixed number of forward error correction bits from a fixed number of said data bits at varying intervals; and generating a separator character and placing said separator character between said data bits and said error correction bits.
Claim 15
Independent Claim
105 words
A method of converting a variable rate stream of data bits to a fixed rate stream of data bits, comprising the steps of: receiving said variable rate stream of data bits; generating a fixed number of error correction bits from a fixed number of said data bits at varying intervals to produce said fixed rate stream of data bits; placing said variable rate stream of data bits into a First In First Out (FIFO) memory; monitoring the number of bits stored in said FIFO memory; and generating said error correction bits when said number of bits stored in said FIFO drops below a predetermined threshold.
Claim 16
Independent Claim
105 words
A method of converting a variable rate stream of data bits to a fixed rate stream of data bits, comprising the steps of: receiving said variable rate stream of data bits; generating a fixed number of error correction bits from a fixed number of said data bits at varying intervals to produce said fixed rate stream of data bits; placing said variable rate stream of data bits into a First In First Out (FIFO) memory; monitoring the number of bits stored in said FIFO memory; and generating said error correction bits when said number of bits stored in said FIFO drops below a predetermined threshold.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1996-04-05 | 1996-10-05 | 1997-04-06 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2000-04-05 | 2000-10-05 | 2001-04-06 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2004-04-05 | 2004-10-05 | 2005-04-06 | $7700.00 | Window Closed / Lapsed |