Electrostatic breakdown protection circuit

Claim 2

An electrostatic breakdown protection circuit for preventing an internal circuit from positive and negative high voltages, comprising: a hot line connected to said internal circuit for supplying a data signal; a bypass line; a first diode connected in a first direction between said hot line and said bypass line; and a second diode connected in a second direction between said hot line and said bypass line and connected in parallel to said first diode; wherein each of said first and second diodes is formed by a first electrode and a second electrode which are separated from each other by an insulation layer provided between said first and second electrodes, said first and second electrodes being offset in a lateral direction by a predetermined distance.

Claim 3

An electrostatic breakdown protection circuit as claimed in claim 1, wherein said bypass line is connected to ground.

Claim 4

An electrostatic breakdown protection circuit for protecting a thin film transistor array, arranged horizontally and vertically, from positive and negative high voltages, comprising: a plurality of vertically extending hot lines, each connected to one terminal of vertically aligned thin film transistors; a plurality of horizontally extending hot lines, each connected to another terminal of horizontally aligned thin film transistors; a bypass line; a plurality of first diodes respectively connected in a first direction between said vertically and horizontally extending hot lines and said bypass line; and a plurality of second diodes respectively connected in a second direction between said vertically and horizontally extending hot lines and said bypass line in parallel to a respective one of said first diodes; wherein each of said first and second diodes is formed by a first electrode and a second electrode which are separated from each other by an insulation layer provided between said first and second electrodes, said first and second electrodes being offset in a lateral direction by a predetermined distance.

Claim 5

An electrostatic breakdown protection circuit for protecting a thin film transistor array, arranged horizontally and vertically, from positive and negative high voltages, comprising: a plurality of vertically extending hot lines, each connected to one terminal of vertically aligned thin film transistors; a plurality of horizontally extending hot lines, each connected to another terminal of horizontally aligned thin film transistors; a bypass line; a plurality of first diodes respectively connected in a first direction between said vertically and horizontally extending hot lines and said bypass line; and a plurality of second diodes respectively connected in a second direction between said vertically and horizontally extending hot lines and said bypass line in parallel to a respective one of said first diodes; wherein each of said first and second diodes is formed by a first electrode and a second electrode which are separated from each other by an insulation layer provided between said first and second electrodes, said first and second electrodes being offset in a lateral direction by a predetermined distance.

Claim 6

An electrostatic breakdown protection circuit as claimed in claim 3, wherein said bypass line is connected to ground.

Claim 7

An electrostatic breakdown protection circuit as claimed in claim 3, wherein said bypass line comprises a first bypass line and a second bypass line, said first bypass line being connected to a one of said horizontally extending hot lines which is located at one end of the array and to each of said vertically extending hot lines, and said second bypass line being connected to a one of said vertically extending hot liens which is located at one end of the array and to each of said first and second diodes which are connected to each of said horizontally extending hot lines.

Claim 8

An electrostatic breakdown protection circuit for protection an internal circuit from positive and negative high voltages, comprising: a hot line connected to said internal circuit for supplying a data signal; a bypass line; a first diode connected in a first direction between said hot line and said bypass line; and a second diode connected in a second direction between said hot line and said bypass line in series with said first diodes; wherein each of said first and second diodes is formed by a first electrode and a second electrode which are separated from each other by an insulation layer provided between said first and second electrodes, said first and second electrodes being offset in a lateral direction by a predetermined distance.

Claim 9

An electrostatic breakdown protection circuit for protection an internal circuit from positive and negative high voltages, comprising: a hot line connected to said internal circuit for supplying a data signal; a bypass line; a first diode connected in a first direction between said hot line and said bypass line; and a second diode connected in a second direction between said hot line and said bypass line in series with said first diodes; wherein each of said first and second diodes is formed by a first electrode and a second electrode which are separated from each other by an insulation layer provided between said first and second electrodes, said first and second electrodes being offset in a lateral direction by a predetermined distance.

Claim 10

An electrostatic breakdown protection circuit as claimed in claim 6, wherein said bypass line is connected to ground.

Claim 11

An electrostatic breakdown protection circuit for protecting a thin film transistor array, arranged horizontally and vertically, from positive and negative high voltages, comprising: a plurality of vertically extending hot lines, each connected to one terminal of vertically aligned thin film transistors; a plurality of horizontally extending hot lines, each connected to another terminal of horizontally aligned thin film transistors; a bypass line; a plurality of first diodes respectively connected in a first direction between said vertically and horizontally extending hot lines and said bypass line; and a plurality of second diodes respectively connected in a second direction between said vertically and horizontally extending hot lines and said bypass line in series with a respective one of said first diodes; wherein each of said first and second diodes is formed by a first electrode and a second electrode which are separated from each other by an insulation layer provided between said first and second electrodes, said first and second electrodes being offset in a lateral direction by a predetermined distance.

Claim 12

An electrostatic breakdown protection circuit for protecting a thin film transistor array, arranged horizontally and vertically, from positive and negative high voltages, comprising: a plurality of vertically extending hot lines, each connected to one terminal of vertically aligned thin film transistors; a plurality of horizontally extending hot lines, each connected to another terminal of horizontally aligned thin film transistors; a bypass line; a plurality of first diodes respectively connected in a first direction between said vertically and horizontally extending hot lines and said bypass line; and a plurality of second diodes respectively connected in a second direction between said vertically and horizontally extending hot lines and said bypass line in series with a respective one of said first diodes; wherein each of said first and second diodes is formed by a first electrode and a second electrode which are separated from each other by an insulation layer provided between said first and second electrodes, said first and second electrodes being offset in a lateral direction by a predetermined distance.

Claim 13

An electrostatic breakdown protection circuit as claimed in claim 8, wherein said bypass line is connected to ground.

Claim 14

An electrostatic breakdown protection circuit as claimed in claim 8, wherein said bypass line comprises a first bypass line and a second bypass line, said first bypass line being connected to a one of said horizontally extending hot lines which is located at one end of the array and to each series connection of said first and second diodes which are connected to each of said vertically extending hot liens, and said second bypass line being connected to a one of said vertically extending hot lines which is located at one end of the array and to each series connection of said first and second diodes which are connected to each of said horizontally extending hot lines.