US5198818A — Oversampled digital-to-analog converter for multi…

Claim 1

Independent Claim 100 words

Digital to analog converter apparatus responsive to a multibit data input word for producing a multilevel analog output, said apparatus comprising: cyclic binary counter means for counting at a clock frequency f clk ; generator logic means responsive to said counter means for producing during each counter means cycle multiple primitive binary waveforms, each such waveform defining a different DC component; select logic means responsive to said data input word for selecting one of said multiple primitive binary waveforms; and low pass filter means for producing an analog output level related to the DC component of said selected binary waveform.

Claim 2

Dependent Claim 100 words

Digital to analog converter apparatus responsive to a multibit data input word for producing a multilevel analog output, said apparatus comprising: cyclic binary counter means for counting at a clock frequency f clk ; generator logic means responsive to said counter means for producing during each counter means cycle multiple primitive binary waveforms, each such waveform defining a different DC component; select logic means responsive to said data input word for selecting one of said multiple primitive binary waveforms; and low pass filter means for producing an analog output level related to the DC component of said selected binary waveform.

Claim 3

Dependent Claim 27 words

The apparatus of claim 1 wherein each counter means cycle defines a midpoint and each of said primitive binary waveforms is symmetric with respect to said midpoint.

Claim 4

Dependent Claim 21 words

The apparatus of claim 1 wherein all of said primitive binary waveforms have the same number of rising and falling edges.

Claim 5

Dependent Claim 39 words

The apparatus of claim 1 wherein each of said primitive binary waveforms is comprised of binary "0" and binary "1" states and wherein all of said primitive binary waveforms start and end each cycle in the same binary state.

Claim 6

Dependent Claim 52 words

The apparatus of claim 1 wherein said counter means defines a plurality of counts during each cycle; and wherein said DC component of each primitive binary waveform is determined by the number of counts during each cycle that the waveform defines a binary "0" state as compared to a binary "1" state.

Claim 7

Dependent Claim 94 words

Apparatus capable of producing L different analog output levels, each representative of a differently configured m bit data input word where L=2 m , said apparatus comprising: primitive waveform generator means for concurrently generating L different primitive binary waveforms, each such waveform having a different DC component; select logic means responsive to each of a sequence of m bit data input words for selecting at least one of said primitive binary waveforms; and output means responsive to said selected primitive binary waveforms for producing an analog output level related to the DC component thereof.

Claim 8

Dependent Claim 94 words

Apparatus capable of producing L different analog output levels, each representative of a differently configured m bit data input word where L=2 m , said apparatus comprising: primitive waveform generator means for concurrently generating L different primitive binary waveforms, each such waveform having a different DC component; select logic means responsive to each of a sequence of m bit data input words for selecting at least one of said primitive binary waveforms; and output means responsive to said selected primitive binary waveforms for producing an analog output level related to the DC component thereof.

Claim 9

Dependent Claim 22 words

The apparatus of claim 6 wherein said generator means repetitively generates each of said primitive binary waveforms over a plurality of cycles.

Claim 10

Dependent Claim 27 words

The apparatus of claim 7 wherein each counter means cycle defines a midpoint and each of said primitive binary waveforms is symmetric with respect to said midpoint.

Claim 11

Dependent Claim 24 words

The apparatus of claim 7 wherein all of said primitive binary waveforms have the same number of rising and falling edges during each cycle.

Claim 12

Dependent Claim 39 words

The apparatus of claim 7 wherein each of said primitive binary waveforms is comprised of binary "0" and binary "1" states and wherein all of said primitive binary waveforms start and end each cycle in the same binary state.

Claim 13

Dependent Claim 98 words

The apparatus of claim 6 including means for applying data input words to said select logic means at a rate of f baud ; binary counter means for cyclically counting at a clock frequency f clk =S.N.f baud where S defines the number of counts per cycle of said counter means and N defines the number of cycles of said counter means during a period in which a single data input word is to be transmitted; and wherein said waveform generator means is responsive to said counter means for generating said L different waveforms during each counter cycle.

Claim 14

Dependent Claim 10 words

The apparatus of claim 11 wherein m=2, L=4 and S=16.

Claim 15

Dependent Claim 28 words

The apparatus of claim 12 wherein said L different primitive binary waveforms have DC components bearing the following amplitude ratios relative to one another: +3, +1, -1, -3.

Claim 16

Dependent Claim 37 words

The apparatus of claim 6 wherein said select logic means in response to each data input word selects two of said primitive binary waveforms; and means for differentially applying said two selected waveforms to said output means.

Claim 17

Dependent Claim 14 words

The apparatus of claim 6 wherein said output means includes low pass filter means.

Claim 18

Independent Claim 94 words

A method of producing L different analog output levels, where L is an integer greater than 1, each representative of a differently configured data input word comprised of m bits where m is an integer greater than 1 and where L=2 m , said method comprising: concurrently generating L different primitive binary waveforms, each such waveform having a different DC component; selecting at least one of said primitive binary waveforms in response to each data input word; and producing an analog output level related to the DC component of the selected primitive binary waveform.

Claim 19

Independent Claim 94 words

A method of producing L different analog output levels, where L is an integer greater than 1, each representative of a differently configured data input word comprised of m bits where m is an integer greater than 1 and where L=2 m , said method comprising: concurrently generating L different primitive binary waveforms, each such waveform having a different DC component; selecting at least one of said primitive binary waveforms in response to each data input word; and producing an analog output level related to the DC component of the selected primitive binary waveform.

Annuity Stage	Window Opens	Payment Deadline	Surcharge Period Until	Estimated Fee	Status
3.5 Years (Year 4)	1996-03-29	1996-09-28	1997-03-30	$2000.00	Window Closed / Lapsed
7.5 Years (Year 8)	2000-03-29	2000-09-28	2001-03-30	$3760.00	Window Closed / Lapsed
11.5 Years (Year 12)	2004-03-29	2004-09-28	2005-03-30	$7700.00	Window Closed / Lapsed

Oversampled digital-to-analog converter for multilevel data transmission

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