Integrated circuit placement method using netlist and predetermined ordering constraints to produce a human readable integrated circuit schematic diagram

Claim 1

A computer-implemented method for placing circuit elements in an inegraded circuit schematic where the circuit elements are initially represented by a netlist to produce a human-readable schematic circuit layout from the netlist, comprising computer-implemented steps of: (a) receiving predetermined ordering constraints indicating preferred relative vertical locations in a schematic diagram of circuit elements that are represented in the netlist; (b) partitioning the circuit elements represented in the netlist in accordance with a predetermined balancing criterion; (c) determining a first value of a cost function associated with the partitioning produced by the partitioning step, the determined value of he cost function being dependent upon he circuit elements crossing the partitioning and the predetermined ordering constraints in the cost function; (d) repeating step (c) to obtain a second value of the cost function associated with a different partition; (e) comparing the first and second values; (f) selecting the partition having the lower cost value; (g) assigning the circuit elements to two groups such that the one group is physically above the other group in the circuit schematic; and (h) repeating steps (b) through (f) recursively to automatically produce horizontal subpartitions of the circuit elements represented by the netlist to produce a human readable schematic circuit layout.