US5179358A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Circuit, counter and frequency synthesizer with adjustable bias current
Assignee: Motorola Solutions Inc
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Filing: 1992-03-04
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Granted: 1993-01-12
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Expires: 2012-03-04
Abstract
Abstract An electronic circuit (100) includes a load stage circuit (116) having at least one FET (118 and 120). The load stage circuit (116) includes an adjustment terminal responsive to an adjustment voltage for controlling the load resistance of the FET (118 and 120). The electronic circuit (100) also includes a bias current generator (124) for generating a bias current. A current steering circuit (122) controls the amount of bias current supplied to the load stage circuit (116). The electronic circuit (100) also includes a plurality of output terminals (112 and 114) for providing an output which is responsive to voltages applied at input terminals (104, 106 and 108) of the current steering circuit (122). Circuit (100) alllows for the adjustment of the bias current to the circuit in order to achieve optimum power dissipation over changing operating conditions.
Inventors
- 👤 Frederick L. Martin
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-06 04:16
CPC Classifications
H; H03; H03K; H03K19/00; H03K19/0008; H03K19/0016; H03L; H03L7/00; H03L7/06; H03L7/16; H03L7/18
Claims Analysis
Total Claims: 25
Claim 1
Independent Claim
68 words
An electronic circuit having adjustable bias current, comprising: a load stage comprising a field-effect transistor, the load stage having an adjustment terminal responsive to an adjustment voltage for controlling the load resistance of the field-effect transistor; a bias current generator means for generating the bias current supplied to the electronic circuit; and a current steering means, for controlling the amount of bias current supplied to the load stage.
Claim 2
Dependent Claim
68 words
An electronic circuit having adjustable bias current, comprising: a load stage comprising a field-effect transistor, the load stage having an adjustment terminal responsive to an adjustment voltage for controlling the load resistance of the field-effect transistor; a bias current generator means for generating the bias current supplied to the electronic circuit; and a current steering means, for controlling the amount of bias current supplied to the load stage.
Claim 3
Dependent Claim
19 words
The electronic circuit having adjustable bias current of claim 1, wherein the circuit is an emitter-coupled logic (ECL) circuit.
Claim 4
Dependent Claim
32 words
The electronic circuit having adjustable bias current of claim 2, wherein the current steering means forms a logic circuit selected from the logic circuit group of NAND, NOR, AND, EXCLUSIVE-OR and OR.
Claim 5
Dependent Claim
35 words
The electronic circuit having adjustable bias current of claim 3, wherein the bias current generator is responsive to a bias current adjustment voltage for controlling the amount of bias current supplied to the electronic circuit.
Claim 6
Dependent Claim
85 words
An electronic circuit having adjustable bias current, comprising: a load stage having a plurality of field-effect transistors, the load stage having an adjustment terminal responsive to an adjustment voltage for controlling the load resistance of the field-effect transistors; a bias current generator having a bias adjustment terminal responsive to a bias current adjustment voltage for generating the bias current supplied to the electronic circuit; and a current steering means for controlling the amount of bias current supplied to each of the plurality of field-effect transistors.
Claim 7
Dependent Claim
85 words
An electronic circuit having adjustable bias current, comprising: a load stage having a plurality of field-effect transistors, the load stage having an adjustment terminal responsive to an adjustment voltage for controlling the load resistance of the field-effect transistors; a bias current generator having a bias adjustment terminal responsive to a bias current adjustment voltage for generating the bias current supplied to the electronic circuit; and a current steering means for controlling the amount of bias current supplied to each of the plurality of field-effect transistors.
Claim 8
Dependent Claim
20 words
The electronic circuit having adjustable bias current of claim 5, wherein the electronic circuit is an emitter-coupled logic (ECL) circuit.
Claim 9
Dependent Claim
41 words
The electronic circuit having adjustable bias current of claim 5, wherein the electronic circuit further comprises: a means coupled to the load stage and bias current generator for generating the bias current adjustment voltage as a function of the adjustment voltage.
Claim 10
Dependent Claim
32 words
The electronic circuit having adjustable bias current of claim 7, wherein the current steering means forms a logic circuit selected from the logic circuit group of NAND, NOR, AND, EXCLUSIVE-OR and OR.
Claim 11
Dependent Claim
128 words
A counter assembly having minimum power dissipation, comprising: a counter, comprising: an electronic circuit having adjustable bias current, including: a load stage comprising a load device; a current steering means coupled to the load stage for controlling the amount of bias current to be supplied to the load device; and a bias current generator coupled to the current steering means for controlling the amount of bias current supplied to the electronic circuit; and a delay estimator coupled to the counter for estimating the propagation delay of the counter and providing a reference output signal which has a value corresponding to the propagation delay of the counter, the bias current generator adjusts the amount of bias current supplied to the electronic circuit in response to the reference output signal.
Claim 12
Dependent Claim
128 words
A counter assembly having minimum power dissipation, comprising: a counter, comprising: an electronic circuit having adjustable bias current, including: a load stage comprising a load device; a current steering means coupled to the load stage for controlling the amount of bias current to be supplied to the load device; and a bias current generator coupled to the current steering means for controlling the amount of bias current supplied to the electronic circuit; and a delay estimator coupled to the counter for estimating the propagation delay of the counter and providing a reference output signal which has a value corresponding to the propagation delay of the counter, the bias current generator adjusts the amount of bias current supplied to the electronic circuit in response to the reference output signal.
Claim 13
Dependent Claim
25 words
The counter assembly of claim 9, wherein the electronic circuit is an emitter-coupled logic (ECL) circuit and the load device is a field effect transistor.
Claim 14
Dependent Claim
15 words
The counter assembly of claim 9, wherein the load device is a field-effect transistor (FET).
Claim 15
Dependent Claim
106 words
A synthesizer, comprising: a reference oscillator; a phase detector coupled to the reference oscillator; and a divider circuit coupled to the phase detector, the divider circuit comprising an electronic circuit having adjustable bias current, comprising: a load stage having a field-effect transistor, the load stage having an adjustment terminal responsive to an adjustment voltage for controlling the load resistance of the field-effect transistor; a bias current generator having a bias adjustment terminal responsive to a bias current adjustment voltage for generating the bias current supplied to the electronic circuit; and a current steering means for controlling the amount of bias current supplied to the field-effect transistor.
Claim 16
Dependent Claim
106 words
A synthesizer, comprising: a reference oscillator; a phase detector coupled to the reference oscillator; and a divider circuit coupled to the phase detector, the divider circuit comprising an electronic circuit having adjustable bias current, comprising: a load stage having a field-effect transistor, the load stage having an adjustment terminal responsive to an adjustment voltage for controlling the load resistance of the field-effect transistor; a bias current generator having a bias adjustment terminal responsive to a bias current adjustment voltage for generating the bias current supplied to the electronic circuit; and a current steering means for controlling the amount of bias current supplied to the field-effect transistor.
Claim 17
Dependent Claim
15 words
The synthesizer of claim 12, wherein the electronic circuit is an emitter-coupled logic (ECL) circuit.
Claim 18
Dependent Claim
36 words
The synthesizer of claim 13, wherein the electronic circuit further comprises: a means coupled to the load stage and bias current generator for generating the bias current adjustment voltage as a function of the adjustment voltage.
Claim 19
Dependent Claim
143 words
A synthesizer, comprising: a reference oscillator; a phase detector coupled to the reference oscillator; and a counter coupled to the phase detector, the counter comprising: an electronic circuit having adjustable bias current, including: a load stage comprising a load device; a current steering means coupled to the load stage for controlling the amount of bias current to be supplied to the load device; and a bias current generator coupled to the current steering means for controlling the amount of bias current supplied to the electronic circuit; and a delay estimator circuit coupled to the counter for estimating the propagation delay of the counter and providing a reference output signal which has a value corresponding to the propagation delay of the counter, the bias current generator adjusts the amount of bias current supplied to the electronic circuit in response to the reference output signal.
Claim 20
Dependent Claim
143 words
A synthesizer, comprising: a reference oscillator; a phase detector coupled to the reference oscillator; and a counter coupled to the phase detector, the counter comprising: an electronic circuit having adjustable bias current, including: a load stage comprising a load device; a current steering means coupled to the load stage for controlling the amount of bias current to be supplied to the load device; and a bias current generator coupled to the current steering means for controlling the amount of bias current supplied to the electronic circuit; and a delay estimator circuit coupled to the counter for estimating the propagation delay of the counter and providing a reference output signal which has a value corresponding to the propagation delay of the counter, the bias current generator adjusts the amount of bias current supplied to the electronic circuit in response to the reference output signal.
Claim 21
Dependent Claim
24 words
The synthesizer of claim 15, wherein the electronic circuit is an emitter-coupled logic (ECL) circuit and the load device is a field effect transistor.
Claim 22
Dependent Claim
14 words
The synthesizer of claim 15, wherein the load device is a field-effect transistor (FET).
Claim 23
Dependent Claim
93 words
A radio, comprising: a receiver; and an electronic circuit having adjustable bias current coupled to the receiver, comprising: a load stage comprising a field-effect transistor, the load stage having an adjustment terminal responsive to an adjustment voltage for controlling the load resistance of the field-effect transistor; a current steering means coupled to the load stage for controlling the amount of bias current to be supplied to the field-effect transistor; and a bias current generator means coupled to the current steering means for controlling the amount of bias current supplied to the electronic circuit.
Claim 24
Dependent Claim
93 words
A radio, comprising: a receiver; and an electronic circuit having adjustable bias current coupled to the receiver, comprising: a load stage comprising a field-effect transistor, the load stage having an adjustment terminal responsive to an adjustment voltage for controlling the load resistance of the field-effect transistor; a current steering means coupled to the load stage for controlling the amount of bias current to be supplied to the field-effect transistor; and a bias current generator means coupled to the current steering means for controlling the amount of bias current supplied to the electronic circuit.
Claim 25
Dependent Claim
36 words
The radio of claim 18, wherein the electronic circuit further comprises: a means coupled to the load stage and bias current generator for generating a bias current adjustment voltage as a function of the adjustment voltage.
References Cited (Backward Citations)
US3958135A
Cited
US4999519A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1996-01-12 | 1996-07-13 | 1997-01-12 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2000-01-12 | 2000-07-13 | 2001-01-12 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2004-01-12 | 2004-07-13 | 2005-01-12 | $7700.00 | Window Closed / Lapsed |