US5175482A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Stepping motor control circuit
Assignee: NEC Electronics Corp
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Filing: 1991-10-16
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Granted: 1992-12-29
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Expires: 2011-10-16
Abstract
Abstract A stepping motor control circuit (50) has a step circuit (51) and a track circuit (52). The track circuit has an up-down counter (1) including an offset circuit (11), and a decoder (2). The offset circuit speeds up the change over from the first digit to the second digit in an up-down counter, when a two-phase excitation system is selected for the stepping motor. The speed-up is by a half period, or so, in terms of the output of the first digit in the up-counting mode or down-counting mode. Therefore, in either of the up-counting or down-counting modes, the excitation output starts to change at the first clock pulse input after the counting direction has been changed. Thus, the operation speed of the control circuit can be improved. Also, the information on the completion of the track operation can be immediately sent to a host device.
Inventors
- 👤 Koji Deguchi
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-30 19:52
CPC Classifications
H; H02; H02P; H02P8/00; H02P8/14; H02P8/18
Claims Analysis
Total Claims: 4
Claim 1
Independent Claim
174 words
A stepping motor control circuit (50) for controlling a stepping motor according to stepping pulses sent from a host device (49), said control circuit comprising: a step circuit (51) for generating a control clock pulse based on said stepping pulse from said host device; a track circuit (52) composed of an up-down counter circuit (1) for counting said control clock pulse from said step circuit and a decoder circuit (2) for decoding the outputs from said counter circuit into excitation outputs, said track circuit being capable of setting a two-phase excitation system and a one-two phase excitation system or a two-one phase excitation system; and an offset circuit (11) for speeding up a changing of the carry value from a first digit to a second digit between a normal rotation and a reverse rotation of the stepping motor, whereby, when the two-phase excitation system is set, said excitation outputs start to change at the input timing of the first control clock pulse for the normal rotation and the reverse rotation of the stepping motor.
Claim 2
Dependent Claim
174 words
A stepping motor control circuit (50) for controlling a stepping motor according to stepping pulses sent from a host device (49), said control circuit comprising: a step circuit (51) for generating a control clock pulse based on said stepping pulse from said host device; a track circuit (52) composed of an up-down counter circuit (1) for counting said control clock pulse from said step circuit and a decoder circuit (2) for decoding the outputs from said counter circuit into excitation outputs, said track circuit being capable of setting a two-phase excitation system and a one-two phase excitation system or a two-one phase excitation system; and an offset circuit (11) for speeding up a changing of the carry value from a first digit to a second digit between a normal rotation and a reverse rotation of the stepping motor, whereby, when the two-phase excitation system is set, said excitation outputs start to change at the input timing of the first control clock pulse for the normal rotation and the reverse rotation of the stepping motor.
Claim 3
Dependent Claim
23 words
A stepping motor control circuit according to claim 1, wherein said offset circuit is controlled by a signal for setting the excitation system.
Claim 4
Dependent Claim
81 words
A stepping motor control circuit according to claim 1, wherein said offset circuit (11) provides an offset in the carry value from pulse positions of the first to the second digits only when the two-phase excitation system has been selected for the stepping motor, whereby when the two-phase excitation system has been set, said excitation outputs from said track circuit start to change at the input timing of the first control clock pulse regardless of the modes of up-counting and down-counting.
References Cited (Backward Citations)
US4803415A
Cited
US5001410A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1995-12-29 | 1996-06-29 | 1996-12-29 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1999-12-29 | 2000-06-29 | 2000-12-29 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2003-12-29 | 2004-06-29 | 2004-12-29 | $7700.00 | Window Closed / Lapsed |