Claims Analysis
Total Claims: 6
Claim 1
Independent Claim
332 words
Method for implementing an RSA encoding procedure using a microcontroller comprising performing a modulo-N exponentiation by e of a message M; N, e and M being integers contained in an n-bit format, according to which method the calculation of the modulo-N exponentiation is broken down into two successive operation, of which the first operation has the form: B.sub.i =a.sub.i.X+T.2.sup.m where B i and X are calculation variables which depend on M and N, where a i is an extract of a format restricted to m bits of a calculation variable A whose value results from a previous operation, which extract is taken in the decreasing order of weight of A, of rank i, and where T is a summing variable used for the calculation of the variable A, and the second operation comprises reducing the length of the variable B i by subtracting a predetermined multiple of the modulus N, and of obtaining a new value A 1 for the variable A, characterised in that the second operation is carried out by means of a modulo-N quasi-reduction obtained from the equation: A.sub.i =q.N'+R where N' is the twos-complement of N in an n-bit format, where q is an integer quotient in a p-bit fixed format, approximated by default, of the division B i /N, with p>m, and where R is a variable provided by the n least significant bits of the variable B i , the result A i of which operation can contain a multiple of the modulus N and can thus present a transgression of d most significant bits with respect to the n-bit format, in that a given number of successive operations is determined as is an approximation tolerance q so that the maximum number of bits d of the transgression accumulated during said successive operations is equal to p-m, and in that an additional modulo quasi-reduction is performed after said given number of operations, which generates a new value of the variable A strictly in the n-bit format.
Claim 2
Dependent Claim
332 words
Method for implementing an RSA encoding procedure using a microcontroller comprising performing a modulo-N exponentiation by e of a message M; N, e and M being integers contained in an n-bit format, according to which method the calculation of the modulo-N exponentiation is broken down into two successive operation, of which the first operation has the form: B.sub.i =a.sub.i.X+T.2.sup.m where B i and X are calculation variables which depend on M and N, where a i is an extract of a format restricted to m bits of a calculation variable A whose value results from a previous operation, which extract is taken in the decreasing order of weight of A, of rank i, and where T is a summing variable used for the calculation of the variable A, and the second operation comprises reducing the length of the variable B i by subtracting a predetermined multiple of the modulus N, and of obtaining a new value A 1 for the variable A, characterised in that the second operation is carried out by means of a modulo-N quasi-reduction obtained from the equation: A.sub.i =q.N'+R where N' is the twos-complement of N in an n-bit format, where q is an integer quotient in a p-bit fixed format, approximated by default, of the division B i /N, with p>m, and where R is a variable provided by the n least significant bits of the variable B i , the result A i of which operation can contain a multiple of the modulus N and can thus present a transgression of d most significant bits with respect to the n-bit format, in that a given number of successive operations is determined as is an approximation tolerance q so that the maximum number of bits d of the transgression accumulated during said successive operations is equal to p-m, and in that an additional modulo quasi-reduction is performed after said given number of operations, which generates a new value of the variable A strictly in the n-bit format.
Claim 3
Dependent Claim
33 words
Method as claimed in claim 1, characterised in that said fixed number of successive operations is reached when the variable A has been fully used by means of its extracts a i .
Claim 4
Dependent Claim
61 words
Method as claimed in claim 2, in which the value of the modulus N is taken in a particular interval, characterised in that said particular interval is equal to: 2.sup.n -2.sup.n-m ; 2.sup.n -1 and in that the value of the approximated quotient q is provided by the most significant bits of the variable B i which transgress the n-bit format.
Claim 5
Dependent Claim
52 words
Method as claimed in claim 3, applied to n-bit variables where n is less than 2000, characterised in that a number of bits p of the approximated quotient q is equal to 32 and a number of bits m of said reduced format of the variable a i is equal to 24.
Claim 6
Dependent Claim
179 words
Method as claimed in claim 2, applicable when the value of the modulus N is chosen in whatever manner from the number of n bits and for the n-bit variables where n is less than 2000, characterised in that a number of bits p of the approximated quotient q is chosen to be equal to 32 and a number of bits m of said reduced format of the variable a i to be equal to 24, in that the value of the approximated quotient q is determined after completion of the first operation: B.sub.i =a.sub.i.X+T.2.sup.m by means of an additional operation: l.sub.i.N* in which l i represents the most significant bits of the variable B i exceeding the n-bit format, and N* represents a binary number limited to its 56 most significant bits of the inverse of modulus N, the result of which additional operation, limited to its 32 most significant bits, produces the value of the approximated quotient q, and in that finally the modulo-N quasi-reduction is performed by means of the above operation: A.sub.i =q.N'+R mentioned hereinbefore.