Audio signal demodulation circuit

Claim 1

An audio signal demodulation circuit comprising: input means for receiving an audio input signal having a bit interleave; a bit de-interleave circuit receiving said audio signal and producing a de-interleave signal that results from canceling the bit interleave of said audio signal; an error correction circuit receiving said de-interleave signal and producing first and second error signals resulting from correcting an error in said de-interleave signal; a word de-interleave circuit receiving said first error signal and producing a second de-interleave signal by canceling a word interleave found in said first error signal; a detection and correction circuit receiving said second de-interleave signal and producing a third error signal resulting from range-detecting and error-detecting said first error signal, said third error signal having range bits; an expansion circuit receiving said second de-interleave signal and said third error signal and producing an expansion signal resulting from utilizing said range bits to expand said second de-interleave signal; an interpolation circuit receiving said expansion signal and producing an interpolation output signal resulting from utilizing said second error signal to interpolate said expansion signal; a counter circuit for producing a count signal resulting from counting errors in said second error signal; a synchronous detection circuit for producing a mute signal resulting from synchronization detecting said audio input signal; first logic means for producing a first logic signal that results from taking a logical product of said count signal and said mute signal; second logic means for producing a second logic signal that results from taking a logical product of said interpolation output signal and said first logic signal; and an integration signal for integrating said second logic signal to produce an audio output signal.