US5162253A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Method of producing capacitive element integrated circuit
Assignee: NEC Corp
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Filing: 1992-04-03
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Granted: 1992-11-10
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Expires: 2012-04-03
Abstract
Abstract For a process of producing a capacitive element with a storage node electrode formed of layered electrode, there is proposed a method of preventing an unstable condition that a part of the storage node electrode during the processes is positioned in the air without support therebelow. The storage node electrode is formed by embedding a polysilicon plug in an aperture which reaches to a silicon active layer on a silicon substrate from the surface where a polysilicon capacitive electrode is formed on a polysilicon capacitive electrode provided thereon with the first capacitive insulating film. After a second capacitive insulating film and a polysilicon capacitive electrode are formed, the polysilicon capacitive electrodes are connected with each other by a polysilicon plug to form a cell plate electrode.
Inventors
- 👤 Kiyoshi Takeuchi
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-01 06:25
CPC Classifications
H; H10; H10B; H10B12/00; H10B12/30; H10B12/31; H10B12/318
Claims Analysis
Total Claims: 4
Claim 1
Independent Claim
272 words
A method of producing a capacitive element for an integrated circuit having two electrodes A and B constituting capacitive elements for use in an integrated circuit wherein at least a part of the electrode A is constituted of a conductor A1, at least a part of the electrode B is constituted of a conductor B1, a part of the conductor A1 and a part of the conductor B1 are arranged respectively above and below embracing a capacitive insulating film, a part of a conductor A2 is arranged below the conductor B1 embracing the capacitive insulating film, a portion of the conductor A1 where the conductor B1 is not present therebelow and a portion of the conductor A2 where the conductor B1 is not present thereabove are connected with each other, characterized by the steps of forming the conductor A2 to provide a first capacitive insulating film on the surface of the conductor A2, forming the conductor B1 on the portion where the conductor A2 is not present and on a part of the conductor A2, and further forming a second capacitive insulating film on an exposed surface of the conductor A2 and on the surface of the conductor B1, forming the conductor A1 on a part of the conductor 81 and at least on a part of the conductor A2, providing an aperture or a recess on a part of the region where the conductor A1 is formed on the conductor A2 so that the aperture or the recess penetrates the conductor A1 to reach the conductor A2 and depositing the conductors on the inside wall of the aperture or the recess.
Claim 2
Independent Claim
272 words
A method of producing a capacitive element for an integrated circuit having two electrodes A and B constituting capacitive elements for use in an integrated circuit wherein at least a part of the electrode A is constituted of a conductor A1, at least a part of the electrode B is constituted of a conductor B1, a part of the conductor A1 and a part of the conductor B1 are arranged respectively above and below embracing a capacitive insulating film, a part of a conductor A2 is arranged below the conductor B1 embracing the capacitive insulating film, a portion of the conductor A1 where the conductor B1 is not present therebelow and a portion of the conductor A2 where the conductor B1 is not present thereabove are connected with each other, characterized by the steps of forming the conductor A2 to provide a first capacitive insulating film on the surface of the conductor A2, forming the conductor B1 on the portion where the conductor A2 is not present and on a part of the conductor A2, and further forming a second capacitive insulating film on an exposed surface of the conductor A2 and on the surface of the conductor B1, forming the conductor A1 on a part of the conductor 81 and at least on a part of the conductor A2, providing an aperture or a recess on a part of the region where the conductor A1 is formed on the conductor A2 so that the aperture or the recess penetrates the conductor A1 to reach the conductor A2 and depositing the conductors on the inside wall of the aperture or the recess.
Claim 3
Dependent Claim
29 words
A method of producing a capacitive element for an integrated circuit as claimed in claim 1, wherein the conductors A1, A2, B1 and B2 are conductors made of polysilicon.
Claim 4
Dependent Claim
35 words
A method of producing a capacitive element for an integrated circuit as claimed in claim 1, wherein conductors to be deposited on the inside wall of the aperture or the recess are made of polysilicon.
References Cited (Backward Citations)
JPS57112066A
Cited
JPS5989450A
Cited
JPS59231851A
Cited
JPS6074470A
Cited
JPS6447858A
Cited
US5006481A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1995-11-10 | 1996-05-11 | 1996-11-10 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1999-11-10 | 2000-05-11 | 2000-11-10 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2003-11-10 | 2004-05-11 | 2004-11-10 | $7700.00 | Window Closed / Lapsed |