US5161158A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Failure analysis system
Assignee: Boeing Co
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Filing: 1989-10-16
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Granted: 1992-11-03
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Expires: 2009-10-16
Abstract
Abstract A failure analysis system for simulating the effect of a subsystem failure in an electronic system. The failure analysis system includes a knowledge base, a user interface, and a failure analysis component. The knowledge base simulates the electronic system in a variety of operating configurations related to the status of a source selection switching mechanism and/or different system modes. The user interface receives simulation condition data that identifies an operating configuration and failure data identifying at least one subsystem failure. The failure analysis component simulates the propagation of the subsystem failure effect through the electronic system by analyzing the failure data in accordance with the knowledge base and the simulation condition data, and generates a set of subsystem failure responses that would occur in the electronic system if the failure actually occurred. The failure analysis system also performs a fault isolation analysis. The user interface receives response data identifying a failure response. The failure analysis component identifies the source of the failure response in the electronic system by backtracking the failure response data in accordance with the knowledge base and the simulation condition data. One or more possible subsystem sources of the failure response identified by the failure response data are identified.
Inventors
- 👤 Abhijit J. Chakravarty
- 👤 Yoshiki Nakamura
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-06 16:15
CPC Classifications
G; G06; G06F; G06F11/00; G06F11/22; G06F11/2257; G06F11/26; G06F11/261
Claims Analysis
Total Claims: 14
Claim 1
Independent Claim
234 words
An apparatus for analyzing failure effect propagation in an electronic system having at least one system mode, the electronic system comprising a plurality of interconnected subsystems, each of which receives input signals and transmits output signals according to the subsystem's own response logic, wherein said interconnected subsystems include at least two redundant subsystems, which generate identical output signals, and at least one switching mechanism for selecting one of the redundant subsystems as a primary signal source for a destination subsystem, the apparatus being integrated into a processor including a central processing unit, a memory, and input and output devices, the apparatus comprising: (a) a knowledge base for simulating the electronic system in a variety of operating configurations, said knowledge base including subsystem interconnection data, and rule data, said rule data including operating configuration contingencies; (b) a user interface including means for receiving simulation condition data that identifies an operating configuration of the electronic system and failure data that identifies at least one subsystem failure; and (c) failure analysis means, coupled to the knowledge base and the user interface, for simulating an effect of a subsystem failure as the subsystem failure propagates through the electronic system by analyzing said failure data in accordance with said knowledge base and said simulation condition data, and for generating a set of subsystem failure responses that would occur in the electronic system if the subsystem failure were to occur.
Claim 2
Independent Claim
234 words
An apparatus for analyzing failure effect propagation in an electronic system having at least one system mode, the electronic system comprising a plurality of interconnected subsystems, each of which receives input signals and transmits output signals according to the subsystem's own response logic, wherein said interconnected subsystems include at least two redundant subsystems, which generate identical output signals, and at least one switching mechanism for selecting one of the redundant subsystems as a primary signal source for a destination subsystem, the apparatus being integrated into a processor including a central processing unit, a memory, and input and output devices, the apparatus comprising: (a) a knowledge base for simulating the electronic system in a variety of operating configurations, said knowledge base including subsystem interconnection data, and rule data, said rule data including operating configuration contingencies; (b) a user interface including means for receiving simulation condition data that identifies an operating configuration of the electronic system and failure data that identifies at least one subsystem failure; and (c) failure analysis means, coupled to the knowledge base and the user interface, for simulating an effect of a subsystem failure as the subsystem failure propagates through the electronic system by analyzing said failure data in accordance with said knowledge base and said simulation condition data, and for generating a set of subsystem failure responses that would occur in the electronic system if the subsystem failure were to occur.
Claim 3
Dependent Claim
35 words
An apparatus as claimed in claim 1, wherein said operating configuration is related to a status of the switching mechanisms, and said simulation condition data includes source selection data for identifying a switching mechanism selection.
Claim 4
Dependent Claim
25 words
An apparatus as claimed in claim 1, wherein said simulation condition data includes mode selection data for identifying a system mode of the electronic system.
Claim 5
Dependent Claim
20 words
An apparatus as claimed in claim 2 or 3, wherein said simulation condition data further includes external operating condition data.
Claim 6
Dependent Claim
17 words
An apparatus as claimed in claim 1, wherein said subsystem interconnection data includes path and signal data.
Claim 7
Dependent Claim
19 words
An apparatus as claimed in claim 1, wherein said rule data includes subsystem failure rules and source selection rules.
Claim 8
Dependent Claim
23 words
An apparatus as claimed in claim 1, wherein the electronic system is an avionics system and the subsystems include line replaceable unit(s) (LRU).
Claim 9
Dependent Claim
39 words
An apparatus as claimed in claim 7, wherein said rule data includes LRU subrules and result data, wherein said result data describes a set of subsequent failures that are generated due to the failures described by said LRU subrules.
Claim 10
Dependent Claim
74 words
An apparatus as claimed in claim 1, wherein said user interface further includes means for receiving failure response data, and wherein said failure analysis means further includes means for predicting a source of a failure response identified by said failure response data in the electronic system by analyzing said failure response data in accordance with said knowledge base and said simulation condition data, whereby a possible subsystem source of the failure response is identified.
Claim 11
Dependent Claim
39 words
An apparatus as claimed in claim 1 or 9, wherein said failure analysis means includes expert system means for controlling the failure analyses and an artificial intelligence shell for interpreting said expert system means via said central processing unit.
Claim 12
Independent Claim
208 words
A method for analyzing failures in an electronic system having at least one system mode, the electronic system comprising a plurality of interconnected subsystems, each of which receives input signals and transmits output signals according to the subsystem's own response logic, wherein the interconnected subsystems include at least two redundant subsystems, which generate identical output signals that are transmitted to a destination subsystem and at least one switching mechanism for selecting one of the redundant subsystems as a primary signal source for a destination subsystem, the method being carried out by a processor including a central processing unit, a memory, and input and output devices, the method comprising the steps of: (a) creating a knowledge base, said knowledge base simulating the electronic system in a variety of operating configurations, said knowledge base including subsystem interconnection data and rule data, said rule data including operating configuration contingencies; (b) receiving simulation condition data for identifying an operating configuration and failure data for defining at least one subsystem failure; (c) simulating an effect of the subsystem failure as the subsystem failure propagates through the electronic system by analyzing said failure data in accordance with said knowledge base and said simulation condition data; and (d) generating a set of subsystem failure responses.
Claim 13
Independent Claim
208 words
A method for analyzing failures in an electronic system having at least one system mode, the electronic system comprising a plurality of interconnected subsystems, each of which receives input signals and transmits output signals according to the subsystem's own response logic, wherein the interconnected subsystems include at least two redundant subsystems, which generate identical output signals that are transmitted to a destination subsystem and at least one switching mechanism for selecting one of the redundant subsystems as a primary signal source for a destination subsystem, the method being carried out by a processor including a central processing unit, a memory, and input and output devices, the method comprising the steps of: (a) creating a knowledge base, said knowledge base simulating the electronic system in a variety of operating configurations, said knowledge base including subsystem interconnection data and rule data, said rule data including operating configuration contingencies; (b) receiving simulation condition data for identifying an operating configuration and failure data for defining at least one subsystem failure; (c) simulating an effect of the subsystem failure as the subsystem failure propagates through the electronic system by analyzing said failure data in accordance with said knowledge base and said simulation condition data; and (d) generating a set of subsystem failure responses.
Claim 14
Dependent Claim
60 words
The method as claimed in claim 11, further including the steps of receiving failure response data, predicting a source of a failure response identified by said failure response data in said electronic system by analyzing said failure response data in accordance with said knowledge base and said simulation condition data; and identifying a possible subsystem source of the failure response.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1995-11-03 | 1996-05-04 | 1996-11-03 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1999-11-03 | 2000-05-04 | 2000-11-03 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2003-11-03 | 2004-05-04 | 2004-11-03 | $7700.00 | Window Closed / Lapsed |