High speed optosemiconductor device having multiple quantum wells

Claim 2

An optosemiconductor device comprising: a superlattice configuration of a first quantum well layer, a second quantum well layer thicker than said first quantum well layer, and a potential barrier layer therebetween, said potential barrier layer having a thickness thereby inviting a tunneling phenomenon, photo-excited carriers generated in a first quantum well layer being tunnelled through said potential barrier layer toward said second quantum well layer so that the tunneled carriers are accumulated in said second quantum well layer; and means for applying an electric field to said superlattice configuration to expel the tunneled carriers from said second quantum well layer, said electric field applying means being arranged to apply said electric field in a direction which is parallel to a stacked face of said superlattice configuration.

Claim 3

A device as set forth in claim 1, wherein said electric field applying means comprises: an N-type contact region formed on one side of said superlattice configuration; and a P-type contact region formed on the other side of said superlattice configuration, said P-type contact region, said superlattice configuration, and said N-type contact region forming a PIN configuration.

Claim 4

A device as set forth in claim 2, wherein said electric field applying means further comprises: a first electrode connected to said N-type contact region; a second electrode connected to said P-type contact region; and means for applying a first voltage and a second voltage lower than said first voltage to said first and second electrodes, respectively.

Claim 5

A device as set forth in claim 1, further comprising: a first semitransparent metal film layer formed on one surface of said superlattice configuration; and a second semitransparent metal film layer formed on the other surface of said superlattice configuration, said superlattice configuration and said first and second metal film layers forming a Fabry-Perot etalon.

Claim 6

A device as set forth in claim 1, wherein said first quantum well layer is made of GaAs and is about 4.5 nm thick, said second quantum well layer being made of GaAs and being about 9.0 nm thick, said potential barrier layer being made of GlGaAs and being about 4.0 nm thick.

Claim 7

A device as set forth in claim 5, further comprising: a semi-insulating GaAs substrate having an opening for radiating a light beam thereto, an AlGaAs buffer layer formed on said GaAs substrate; and an AlGaAs protection layer, said superlattice configuration being sandwiched between said AlGaAs buffer layer and said AlGaAs protection layer.

Claim 8

A device as set forth in claim 1, wherein said first quantum well layer is made of InGaAs and is about 4.4 nm thick, said second quantum well layer being made of InGaAs and being about 8.8 nm thick, said second barrier layer being made of Inp and being about 4.1 nm thick.

Claim 9

A device as set forth in claim 8, further comprising: a semi-insulating InP substrate having an opening for radiating a light beam thereto, an InP buffer layer formed on said InP substrate; and an InP protection layer, said superlattice configuration being sandwiched between said InP buffer layer and said InP protection layer.

Claim 10

An optosemiconductor device comprising: a superlattice configuration of a first quantum well layer, a second quantum well layer thicker than said first quantum well layer, and a potential barrier layer therebetween, said potential barrier layer having a thickness thereby inviting a tunneling phenomenon, photo-excited carriers generated in said first quantum well layer being tunneled through said potential barrier layer toward said second quantum well layer so that the tunneling carriers are accumulated in said second quantum well layer; and means for applying an electric field to said superlattice configuration to expel the tunneled carriers from said second quantum well layer, said second quantum well layer being split into two quantum wells, said superlattice configuration further comprising another potential barrier layer formed between said two quantum wells to prevent the occurrence of an avalanche phenomenon therein, said electric field applying means being arranged to apply said electric field in a direction which is perpendicular to a stacked face of said superlattice configuration.

Claim 11

An optosemiconductor device comprising: a superlattice configuration of a first quantum well layer, a second quantum well layer thicker than said first quantum well layer, and a potential barrier layer therebetween, said potential barrier layer having a thickness thereby inviting a tunneling phenomenon, photo-excited carriers generated in said first quantum well layer being tunneled through said potential barrier layer toward said second quantum well layer so that the tunneling carriers are accumulated in said second quantum well layer; and means for applying an electric field to said superlattice configuration to expel the tunneled carriers from said second quantum well layer, said second quantum well layer being split into two quantum wells, said superlattice configuration further comprising another potential barrier layer formed between said two quantum wells to prevent the occurrence of an avalanche phenomenon therein, said electric field applying means being arranged to apply said electric field in a direction which is perpendicular to a stacked face of said superlattice configuration.

Claim 12

A device as set forth in claim 9, wherein said electric field applying means comprises: an N-type semiconductor layer on a stacked face of said superlattice configuration; and a P-type semiconductor layer on the other stacked surface of said superlattice configuration, said P-type semiconductor layer, said superlattice configuration, and said N-type semiconductor layer forming a PIN configuration.

Claim 13

A device as set forth in claim 10, wherein said electric field applying means further comprises: an I-type layer inserted between said N-type semiconductor layer and said superlattice configuration; and an I-type layer inserted between said P-type semiconductor layer and said superlattice configuration.

Claim 14

A device as set forth in claim 10, wherein said electric field applying means further comprises: a first electrode connected to said N-type semiconductor region; a second electrode connected to said P-type semiconductor region; and means for applying a first voltage and a second voltage lower than said first voltage to said first and second electrodes, respectively.

Claim 15

A device as set forth in claim 9, wherein said first quantum well layer is made of GaAs and is about 4.5 nm thick, said two quantum wells of said second quantum well layer being made of GaAs and being respectively about 9.0 nm and about 10.0 nm thick, said potential barrier layer being made of GlGaAs and being about 4.0 nm thick, said another potential barrier layer being made of AlGaAs and being about 10.0 nm thick.

Claim 16

A device as set forth in claim 13, further comprising: an N-type GaAs substrate; an N-type AlGaAs buffer layer on said GaAs substrate, said N-type AlGaAs buffer layer and said GaAs substrate having an opening therein for radiating a light beam therethrough; an N-type AlGaAs layer formed on said N-type AlGaAs buffer layer; and a P-type AlGaAs layer, said superlattice configuration being sandwiched between said N-type AlGaAs layer and said P-type AlGaAs layer.

Claim 17

A device as set forth in claim 9, wherein said first quantum layer is made of InGaAs and is about 4.4 nm thick, said two quantum wells of said second quantum well layer being made of InGaAs and being respectively about 8.8 nm and about 10.0 nm thick, said potential barrier layer being made of InP and being about 4.1 nm thick, said another potential barrier layer being made of InP and being about 10.0 nm thick.

Claim 18

A device as set forth in claim 15, further comprising: an N-type InP substrate; an N-type InP layer on said InP substrate; and a P-type InP layer, said superlattice configuration being sandwiched between said N-type InP layer and said P-type InP layer.

Claim 19

An optosemiconductor device comprising a superlattice configuration of a first quantum well layer, a second quantum well layer, and a potential barrier layer therebetween, said potential barrier layer having a thickness thereby inviting a tunneling phenomenon, photo-excited carriers generated in said first quantum well layer being tunneled through said potential barrier layer toward said second quantum well layer, so that the tunneled carriers are accumulated in said second quantum well layer, said second quantum well layer comprising first and second quantum wells forming a broken gap type heterojunction where a lower end of a conduction band of said first quantum well is lower than a higher end of a valence band of said second quantum well, a ground quantum energy level of electrons of said first quantum well layer being higher than a ground quantum energy level of electrons of said first quantum well, a ground quantum energy level of holes of said first quantum well layer being higher than a ground quantum energy level of holes of said second quantum well, whereby the tunneled electrons in said first quantum well are recombined with the tunneled holes in said second quantum well at said broken gap type heterojunction.

Claim 20

An optosemiconductor device comprising a superlattice configuration of a first quantum well layer, a second quantum well layer, and a potential barrier layer therebetween, said potential barrier layer having a thickness thereby inviting a tunneling phenomenon, photo-excited carriers generated in said first quantum well layer being tunneled through said potential barrier layer toward said second quantum well layer, so that the tunneled carriers are accumulated in said second quantum well layer, said second quantum well layer comprising first and second quantum wells forming a broken gap type heterojunction where a lower end of a conduction band of said first quantum well is lower than a higher end of a valence band of said second quantum well, a ground quantum energy level of electrons of said first quantum well layer being higher than a ground quantum energy level of electrons of said first quantum well, a ground quantum energy level of holes of said first quantum well layer being higher than a ground quantum energy level of holes of said second quantum well, whereby the tunneled electrons in said first quantum well are recombined with the tunneled holes in said second quantum well at said broken gap type heterojunction.

Claim 21

A device as set forth in claim 17, wherein the ground quantum energy level of electrons of said first quantum well is approximately the same as the ground quantum energy level of holes of said second quantum well.

Claim 22

A device as set forth in claim 17, wherein said first and second quantum wells of said second quantum layer are laminated along a direction of lamination of said first quantum layer and said potential barrier.

Claim 23

A device as set forth in claim 19, wherein said quantum well layer is made of InGaAsSb and is about 4.0 nm thick, said first quantum well of said second quantum well layer being made of InAs and being about 10.0 nm thick and said second quantum well of said second quantum well layer being made of GaSb and being about 8.0 nm thick, said potential barrier layer being made of AlSb and being about 2.5 nm thick.

Claim 24

A device as set forth in claim 17, wherein said first and second quantum wells of said second quantum well layer are laminated in a direction which is perpendicular to the direction of lamination of said first quantum well layer and said potential barrier.

Claim 25

A device as set forth in claim 21, wherein said first quantum well layer is made of InGaAsSb and is about 4.0 nm thick, said first quantum well of said second quantum well layer being made of InAs and being about 17.4 nm wide and said second quantum well of said second quantum well layer being made of GaSb and being about 17.4 nm wide, said potential barrier layer being made of AlSb and being about 2.5 nm thick.

Claim 26

A device as set forth in claim 22, wherein said first and second quantum wells are manufactured using a step flow mode.

Claim 27

A device as set forth in claim 17, further comprising two optical mirrors sandwiching said super-lattice configuration, said superlattice configuration with said optical mirrors thereby forming a Fabry-Perot etalon.