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US5157351A Expired / Lapsed US ⏱️ 0.0 years remaining

Insulated gate enhancement mode field effect transistor with slew-rate control on drain output

Assignee: STMicroelectronics lnc USA
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Filing: 1991-08-28
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Granted: 1992-10-20
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Expires: 2011-08-28
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Abstract

Abstract Voltage slew-rate control for inductive load connected to the drain of an insulated gate enhancement mode field effect transistor is disclosed. The voltage slew-rate control is accomplished by incorporating a current integrator between the gate and drain of the field effect transistor, thereby effectively annihilating the capacitance of the field effect transistor which has heretofore proven to be generally responsible for instability and oscillations when slew-rate control is attempted in such a circuit. The current integrator includes a capacitor and a current source in circuit with a high speed unity gain buffer amplifier. The buffer amplifier preferably has a low impedance through the frequencies of interest to prevent the natural resonances of stray capacitances with the inductive load.

Inventors

  • 👤 Francesco Carobolante

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-01 21:59
CPC Classifications
H; H03; H03K; H03K17/00; H03K17/16; H03K17/161; H03K17/165; H03K17/166

Claims Analysis

Total Claims: 28
Claim 1
Independent Claim 103 words
In combination with circuit means including an insulated gate enhancement mode field effect transistor means, said field effect transistor means including a gate, a source and a drain, an inductive load means connected in circuit with said drain of said field effect transistor, the improvement which comprises: load voltage slew-rate control means comprising constant current integrator means, said constant current integrator means connected in circuit between said gate and said drain of said field effect transistor means, whereby, a local feedback at said gate of said field effect transistor means due to gate-drain capacitance is effectively annihilated by said constant current integrator means.
Claim 2
Dependent Claim 103 words
In combination with circuit means including an insulated gate enhancement mode field effect transistor means, said field effect transistor means including a gate, a source and a drain, an inductive load means connected in circuit with said drain of said field effect transistor, the improvement which comprises: load voltage slew-rate control means comprising constant current integrator means, said constant current integrator means connected in circuit between said gate and said drain of said field effect transistor means, whereby, a local feedback at said gate of said field effect transistor means due to gate-drain capacitance is effectively annihilated by said constant current integrator means.
Claim 3
Dependent Claim 76 words
The combination of claim 1, wherein said current integrator means comprises capacitor means having one end connected in circuit between said load and said drain of said field effect transistor means, a current source connected in circuit with the other end of said capacitor means, a buffer amplifier means having a predetermined operating frequency range is connected in circuit between said other end of said capacitor means and said gate of said field effect transistor means.
Claim 4
Dependent Claim 14 words
The combination of claim 2, wherein said current source is a constant current source.
Claim 5
Dependent Claim 13 words
The combination of claim 2, wherein said buffer amplifier means comprises NPN-type transistors.
Claim 6
Dependent Claim 31 words
The combination of claim 2, wherein said buffer amplifier means has a predetermined output impedance of less than about 500 ohms over the operating frequency range of said buffer amplifier means.
Claim 7
Dependent Claim 43 words
The combination of claim 5, wherein said buffer amplifier means has an operating frequency range such that the bandwidth of said buffer amplifier means is at least ten times the resonant frequency of said load means together with said field effect transistor means.
Claim 8
Dependent Claim 16 words
The combination of claim 2, wherein said buffer amplifier means comprises a class AB-type amplification stage.
Claim 9
Dependent Claim 60 words
A circuit for driving an inductive load, comprising: an insulated gate enhancement mode field effect transistor having a gate, a source, and a drain, the drain being connected in circuit with said inductive load, a current integrator connected in circuit between the gate and the drain of said field effect transistor to control a voltage slew-rate to said inductive load.
Claim 10
Dependent Claim 60 words
A circuit for driving an inductive load, comprising: an insulated gate enhancement mode field effect transistor having a gate, a source, and a drain, the drain being connected in circuit with said inductive load, a current integrator connected in circuit between the gate and the drain of said field effect transistor to control a voltage slew-rate to said inductive load.
Claim 11
Dependent Claim 14 words
The circuit of claim 8 wherein said current integrator is a constant current integrator.
Claim 12
Dependent Claim 64 words
The circuit of claim 8 wherein said current integrator comprises a capacitor having one end connected between said inductive load and the drain of said field effect transistor, a current source connected with another end of said capacitor, and a buffer amplifier having a predetermined operating frequency range connected between said another end of said capacitor and the gate of said field effect transistor.
Claim 13
Dependent Claim 17 words
The circuit of claim 10 wherein said buffer amplifier is a high speed unity gain buffer amplifier.
Claim 14
Dependent Claim 14 words
The circuit of claim 10 wherein said current source is a constant current source.
Claim 15
Dependent Claim 12 words
The circuit of claim 10 wherein said current source is time dependent.
Claim 16
Dependent Claim 12 words
The circuit of claim 10 wherein said buffer amplifier comprises NPN transistors.
Claim 17
Dependent Claim 25 words
The circuit of claim 10 wherein said buffer amplifier has a predetermined output impedance of less than about 500 ohms over the predetermined operating frequency.
Claim 18
Dependent Claim 28 words
The circuit of claim 10 wherein said buffer amplifier has a bandwidth at least ten times the resonant frequency of said load together with said field effect transistor.
Claim 19
Dependent Claim 14 words
The circuit of claim 10 wherein said buffer amplifier comprises a class AB-type amplifier.
Claim 20
Dependent Claim 82 words
A driver for an inductive load, comprising: an enhancement mode FET, having a source and a drain for connection in a current path with said inductive load, and a gate; a buffer amplifier having a predetermined operating frequency range to reduce feedback due to a gate to drain capacitance of said FET; a current source connected to an input of said buffer amplifier; and a capacitor connected between the drain of said field effect transistor and the input of said buffer amplifier.
Claim 21
Dependent Claim 82 words
A driver for an inductive load, comprising: an enhancement mode FET, having a source and a drain for connection in a current path with said inductive load, and a gate; a buffer amplifier having a predetermined operating frequency range to reduce feedback due to a gate to drain capacitance of said FET; a current source connected to an input of said buffer amplifier; and a capacitor connected between the drain of said field effect transistor and the input of said buffer amplifier.
Claim 22
Dependent Claim 17 words
The driver of claim 18 wherein said buffer amplifier is a high speed unity gain buffer amplifier.
Claim 23
Dependent Claim 14 words
The driver of claim 18 wherein said current source is a constant current source.
Claim 24
Dependent Claim 15 words
The driver of claim 18 wherein said current source is a time dependent current source.
Claim 25
Dependent Claim 12 words
The driver of claim 18 wherein said buffer amplifier comprises NPN transistors.
Claim 26
Dependent Claim 26 words
The driver of claim 18 wherein said buffer amplifier has a predetermined output impedance of less than about 500 ohms over the predetermined operating frequency range.
Claim 27
Dependent Claim 28 words
The driver of claim 18 wherein said buffer amplifier has a bandwidth at least ten times the resonant frequency of said load together with said field effect transistor.
Claim 28
Dependent Claim 14 words
The driver of claim 18 wherein said buffer amplifier comprises a class AB-type amplifier.

References Cited (Backward Citations)

US4134076A Cited
US5015968A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1995-10-20 1996-04-20 1996-10-20 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1999-10-20 2000-04-20 2000-10-20 $3760.00 Window Closed / Lapsed
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