MOS FET with current sensing terminal

Claim 2

A MOS FET comprising: a power MOS FET composed of a plurality of MOS FET cells formed on a semiconductor substrate and connected in parallel with each other; a current sensing element composed of one of said MOS FET cells or a predetermined number of said MOS FET cells connected in parallel, said predetermined number being smaller than the number of said MOS FET cells constituting said power MOS FET, said MOS FET cells having source electrodes; a Miller pad on said semiconductor substrate and connected to said source electrodes of said MOS FET cells constituting said current sensing element; a Kelvin pad on said semiconductor substrate and connected to said source electrode of said power MOS FET, said Kelvin pad being separated from said Miller pad; and a resistive element formed by a resistive film on said semiconductor substrate and connected between said Miller pad and said Kelvin pad for sensing current.

Claim 3

A MOS FET as claimed in claim 1, wherein said resistive film is made of a polysilicon forming a polysilicon resistor.

Claim 4

A MOS FET comprising: a power MOS FET composed of a plurality of MOS FET cells formed on a semiconductor substrate and connected in parallel to each other; a current sensing element composed of one of MOS FET cells or a predetermined number of MOS FET cells connected in parallel, said predetermined number being smaller than the number of said MOS FET cells constituting said power MOS FET, said MOS FET cells having source electrodes; a Miller pad on said semiconductor substrate and connected to said source electrodes of said MOS FET cells constituting said current sensing element; a Kelvin pad on said semiconductor substrate and connected to said source electrode of said power MOS FET, said Kelvin pad being separated from said Miller pad; and a resistive element formed in said semiconductor substrate with a diffusion region forming a diffusion resistor, said diffusion resistor being connected between said Miller pad and said Kelvin pad for sensing current.

Claim 5

A MOS FET comprising: a power MOS FET composed of a plurality of MOS FET cells formed on a semiconductor substrate and connected in parallel to each other; a current sensing element composed of one of MOS FET cells or a predetermined number of MOS FET cells connected in parallel, said predetermined number being smaller than the number of said MOS FET cells constituting said power MOS FET, said MOS FET cells having source electrodes; a Miller pad on said semiconductor substrate and connected to said source electrodes of said MOS FET cells constituting said current sensing element; a Kelvin pad on said semiconductor substrate and connected to said source electrode of said power MOS FET, said Kelvin pad being separated from said Miller pad; and a resistive element formed in said semiconductor substrate with a diffusion region forming a diffusion resistor, said diffusion resistor being connected between said Miller pad and said Kelvin pad for sensing current.

Claim 6

A MOS FET comprising: a plurality of MOS FET cells, each of said cells including a drain region of a semiconductor substrate having a first conductivity type, a base region of a second conductivity type formed in a main surface of said semiconductor substrate, said second conductivity type being opposite to said first conductivity type, a source region of said first conductivity type formed in said base region, and a gate electrode on said base region between said drain region and said source region and through a gate insulating film; a drain electrode, a source pad and a gate pad formed on said semiconductor substrate, said drain electrode, said source pad and said gate pad being connected to said drain regions, said source regions and said gate electrodes being connected commonly and respectively at a majority of said MOS FET cells; a Miller pad on said semiconductor substrate and connected to some of all of the remaining minority of said MOS FET cells; a Kelvin pad on said semiconductor substrate and connected to said source regions of said majority of said MOS FET cells, said Kelvin pad being separated from said Miller pad; and a resistive element formed by a resistive film on said semiconductor substrate, said resistive element being connected between said Miller pad and said Kelvin pad for sensing current.

Claim 7

A MOS FET comprising: a plurality of MOS FET cells, each of said cells including a drain region of a semiconductor substrate having a first conductivity type, a base region of a second conductivity type formed in a main surface of said semiconductor substrate, said second conductivity type being opposite to said first conductivity type, a source region of said first conductivity type formed in said base region, and a gate electrode on said base region between said drain region and said source region and through a gate insulating film; a drain electrode, a source pad and a gate pad formed on said semiconductor substrate, said drain electrode, said source pad and said gate pad being connected to said drain regions, said source regions and said gate electrodes being connected commonly and respectively at a majority of said MOS FET cells; a Miller pad on said semiconductor substrate and connected to some of all of the remaining minority of said MOS FET cells; a Kelvin pad on said semiconductor substrate and connected to said source regions of said majority of said MOS FET cells, said Kelvin pad being separated from said Miller pad; and a resistive element formed by a resistive film on said semiconductor substrate, said resistive element being connected between said Miller pad and said Kelvin pad for sensing current.

Claim 8

A MOS FET as claimed in claim 4, wherein said gate electrode of said MOS FET cell and said resistive film are made of polysilicon.

Claim 9

A MOS FET comprising: a plurality of MOS FET cells each including a drain region of a semiconductor substrate having a first conductivity type, a base region of a second conductivity type formed in a main surface of said semiconductor substrate, said second conductivity type being opposite to said first conductivity type, a source region of said first conductivity type formed in said base region and a gate electrode on said base region between said drain region and said source region and through a gate insulating film; a drain electrode, a source pad and a gate pad formed on said semiconductor substrate, said drain electrode, said source pad and said gate pad to said drain regions, said source regions and said gate electrodes being connected commonly and respectively at a majority of said MOS FET cells; a Miller pad on said semiconductor substrate and connected to at least some of the remaining minority of said MOS FET cells; a Kelvin pad on said semiconductor substrate and connected to said source regions of said majority of said MOS FET cells, said Kelvin pad being separated from said Miller pad; and a resistive element formed by a diffusion region in said semiconductor substrate, said resistive element being connected between said Miller pad and said Kelvin pad for sensing current.

Claim 10

A MOS FET comprising: a plurality of MOS FET cells each including a drain region of a semiconductor substrate having a first conductivity type, a base region of a second conductivity type formed in a main surface of said semiconductor substrate, said second conductivity type being opposite to said first conductivity type, a source region of said first conductivity type formed in said base region and a gate electrode on said base region between said drain region and said source region and through a gate insulating film; a drain electrode, a source pad and a gate pad formed on said semiconductor substrate, said drain electrode, said source pad and said gate pad to said drain regions, said source regions and said gate electrodes being connected commonly and respectively at a majority of said MOS FET cells; a Miller pad on said semiconductor substrate and connected to at least some of the remaining minority of said MOS FET cells; a Kelvin pad on said semiconductor substrate and connected to said source regions of said majority of said MOS FET cells, said Kelvin pad being separated from said Miller pad; and a resistive element formed by a diffusion region in said semiconductor substrate, said resistive element being connected between said Miller pad and said Kelvin pad for sensing current.