Claims Analysis
Total Claims: 12
Claim 1
Independent Claim
274 words
A layered neural network system comprising: a) resolving means for determining, for each layer, states of output neurons i based on input neurons j which are interconnected by way of synapses, b) means for storing synaptic coefficients C ij associated with these synapses, c) means for training and for updating the synaptic coefficients C ij ; and d) means for storing the neuron states, wherein the improvement comprises that the means for storing the synaptic coefficients comprises at least one word-organized memory arrangement comprising: a plurality of data cells arranged in rows and columns to form a matrix, a single output bus comprising a plurality of lines for supplying a data word corresponding to a plurality of the bits stored in a row or column of the matrix; at least a plurality of first and a plurality of second switches, each of said first switches being connected in series with a different one of said second switches between one of said cells and one of said lines of said output bus; means for addressing said matrix in a first mode such that the stored bits appear as a word in a first bit arrangement on said single output bus, means for addressing said matrix in a second mode such that, with the same cell contents in the matrix, the stored bits appear as a word in a second bit arrangement on said same single output bus, and said addressing means being connected to such matrix such that, in either addressing mode, a same selection signal when applied to the matrix will activate the same switches thereby addressing the same word stored in the matrix.
Claim 2
Dependent Claim
274 words
A layered neural network system comprising: a) resolving means for determining, for each layer, states of output neurons i based on input neurons j which are interconnected by way of synapses, b) means for storing synaptic coefficients C ij associated with these synapses, c) means for training and for updating the synaptic coefficients C ij ; and d) means for storing the neuron states, wherein the improvement comprises that the means for storing the synaptic coefficients comprises at least one word-organized memory arrangement comprising: a plurality of data cells arranged in rows and columns to form a matrix, a single output bus comprising a plurality of lines for supplying a data word corresponding to a plurality of the bits stored in a row or column of the matrix; at least a plurality of first and a plurality of second switches, each of said first switches being connected in series with a different one of said second switches between one of said cells and one of said lines of said output bus; means for addressing said matrix in a first mode such that the stored bits appear as a word in a first bit arrangement on said single output bus, means for addressing said matrix in a second mode such that, with the same cell contents in the matrix, the stored bits appear as a word in a second bit arrangement on said same single output bus, and said addressing means being connected to such matrix such that, in either addressing mode, a same selection signal when applied to the matrix will activate the same switches thereby addressing the same word stored in the matrix.
Claim 3
Dependent Claim
16 words
An arrangement as claimed in claim 1, characterized in that each switch comprises a selection transistor.
Claim 4
Dependent Claim
50 words
An arrangement as claimed in claim 1, characterized in that the matrix of data words is diagonally distributed in the arrangement so that a row or column of the matrix is diagonally distributed in the arrangement, the other rows or columns of the matrix being distributed parallel to said diagonal.
Claim 5
Dependent Claim
48 words
An arrangement as claimed in claim 1, characterized in that the order of data of a word on the bus is established by a circulation shift register which is controlled by a circulation member which shifts the data as a function of the addressed row of the matrix.
Claim 6
Dependent Claim
56 words
An arrangement as claimed in claim 1, characterized in that the order of the data of a word on the bus is established by an adder which determines an internal address of a buffer circuit by adding a predetermined value, associated with the addressed row in the arrangement, to an external address of the buffer circuit.
Claim 7
Dependent Claim
28 words
An arrangement as claimed in claim 1, characterized in that several data word matrices are distributed in the arrangement in several dimensions which correspond to several selection modes.
Claim 8
Dependent Claim
17 words
An arrangement as claimed in claim 1, characterized in that it is realized as an integrated circuit.
Claim 9
Dependent Claim
29 words
The arrangement of claim 1, wherein the first mode addressing means is connected to the first switches, and the second mode addressing means is connected to the second switches.
Claim 10
Dependent Claim
22 words
A neural network system as claimed in claim 1, characterized in that it is realized in the form of an integrated circuit.
Claim 11
Dependent Claim
32 words
A neural network system as claimed in claim 1, characterized in that the means for storing the neuron states comprises a shift register for associating each neuron state with its synaptic coefficient.
Claim 12
Dependent Claim
38 words
A neural network system as claimed in claim 10, characterized in that it comprises an address calculator which performs the circulation in the shift register by generating commands corresponding to the row of the addressed synaptic coefficient word.