US5151925A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Coherent demodulation method for a digitally modulated signal having a continuous phase and a constant envelope
Assignee: US Philips Corp
•
Filing: 1989-06-22
•
Granted: 1992-09-29
•
Expires: 2009-06-22
Abstract
Abstract The method ensures the coherent demodulation by digitally processing a continuous-phase modulated signal (for instance, of the GMSK type). The received signal is transposed in the baseband, converted into a digital signal and transferred to a signal processor. Each transmitted data packet has a known preamble sequence of N bits which allows for approximate estimation of the frame-synchronization and the bit-synchronization and also the initial phase and the residual frequency offset. The progressive refinement of the estimation is obtained with two interleaved digital loops: a slow loop for detecting the bit-synchronization and a fast loop effecting intermediate decisions over additional blocks of bits for the estimation of the initial phase and the residual frequency offset.
Inventors
- 👤 Benoit Gelin
- 👤 Michel LeBourg
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-05 13:24
CPC Classifications
H; H04; H04L; H04L27/00; H04L27/18; H04L27/22; H04L27/233; H04L27/2332; H04L27/0014; H04L2027/0024; H04L2027/0026; H04L2027/003; H04L2027/0083; H04L2027/0089; H04L2027/0093; H04L2027/0095
Claims Analysis
Total Claims: 17
Claim 1
Independent Claim
250 words
Method of coherent demodulation of a digitally modulated received signal having a continuous phase and a constant envelope, a modulated term of the continuous phase being equal to the convolution product of a phase impulse response extending over a plurality of bit periods, and binary information transmitted in packets, each packet having a known preamble of N bits, the received signal being transposed in a baseband over two quadrature channels, converted into a digital signal, and transferred to a digital signal processor which carries out the demodulation method, comprising the steps of: detecting approximately, the frame-synchronization and the bit-synchronization of a packet by correlating said known preamble of N bits with a differential phase of the received signal; beginning an estimation of approximate values θ 0 and Δf 0 of an initial phase θ 0 and residual frequency offset Δf 0 , respectively, of the received signal; progressively refining the approximate values of the initial phase and residual frequency offset by means of two interleaved digital loops: a slow loop for detecting the bit-synchronization, said slow loop being activated when a predetermined threshold value is exceeded by a difference ε which is a function of the approximate values θ 0 and Δf 0 , and a fast loop for effecting intermediate decisions over additional blocks of bits for extracting decided bits and for estimation of θ 0 and Δf 0 , said fast loop being activated following a determination that said predetermined threshold is not exceeded by said difference ε.
Claim 2
Dependent Claim
250 words
Method of coherent demodulation of a digitally modulated received signal having a continuous phase and a constant envelope, a modulated term of the continuous phase being equal to the convolution product of a phase impulse response extending over a plurality of bit periods, and binary information transmitted in packets, each packet having a known preamble of N bits, the received signal being transposed in a baseband over two quadrature channels, converted into a digital signal, and transferred to a digital signal processor which carries out the demodulation method, comprising the steps of: detecting approximately, the frame-synchronization and the bit-synchronization of a packet by correlating said known preamble of N bits with a differential phase of the received signal; beginning an estimation of approximate values θ 0 and Δf 0 of an initial phase θ 0 and residual frequency offset Δf 0 , respectively, of the received signal; progressively refining the approximate values of the initial phase and residual frequency offset by means of two interleaved digital loops: a slow loop for detecting the bit-synchronization, said slow loop being activated when a predetermined threshold value is exceeded by a difference ε which is a function of the approximate values θ 0 and Δf 0 , and a fast loop for effecting intermediate decisions over additional blocks of bits for extracting decided bits and for estimation of θ 0 and Δf 0 , said fast loop being activated following a determination that said predetermined threshold is not exceeded by said difference ε.
Claim 3
Dependent Claim
177 words
A method as claimed in claim 1, in which the detecting step comprises a first correlation of said known preamble of N bits with the differential phase of the received signal for determining the bit synchronization of said packets at a precision of ±T/4, where T is the duration of one bit, and a second correlation of said known preamble of N bits with the differential phase of the received signal effected with a reference signal shifted by T/4, the corresponding correlation functions each exhibiting a highest peak and a lowest peak which are independent of the initial phase and slightly dependent on the residual frequency offset, the highest peak and lowest peak defining a primary bit-synchronization value SYNP and a secondary bit-synchronization value SYNS respectively, the combination of said first and second correlations yielding a precision of ±T/8 in the bit-synchronization detected, the detection of the bit-synchronization being followed by filtering the value SYNP by means of a matched filter having a finite impulse response of the Gaussian type in order to limit the noise band.
Claim 4
Dependent Claim
111 words
A method as claimed in claim 2 in which the estimation of the approximate values of the initial phase θ 0 and of the residual frequency offset Δf 0 following the filtering step comprises the following steps: eliminating a modulation term by forming the product of the received signal and the conjugate value of a reference signal; phase unrolling by eliminating any 2π phase jumps to obtain a linear variation having the following equation Y=Δω.sub.O x+θ.sub.O with Δω.sub.O =2πΔf.sub.O calculating the approximate values Δω O and θ O by means of linear regression method and the difference ##EQU14## between the points corresponding with the unrolled phase and a linear regression line.
Claim 5
Dependent Claim
72 words
A method as claimed in claim 3 in which when said difference ε is smaller than said threshold value, the estimation of the approximate values of Δf O and θ O is refined following a repetition of said fast loop for a plurality of tours and exploiting an intermediate decision on the N bits of the preamble sequence to which, during each tour a specified number of additional decided bits are added.
Claim 6
Dependent Claim
69 words
A method as claimed in claim 3, in which when the said difference ε exceeds the said threshold value as a result of an erroneous evaluation of the bit-synchronization, said progressively refining step comprises initializing Δf O and θ O following a slow loop to re-effect the matched filtering and the estimation of the approximate values of Δf O and θ O by filtering said secondary bit-synchronization value SYNS.
Claim 7
Dependent Claim
37 words
A method as claimed in claim 3, in which the digitally modulated signals comprise signals modulated according to the GMSK, 2SRC, TFM, GTFM, . . . types of modulation, whose phase evolution law follows a progressive variation.
Claim 8
Dependent Claim
72 words
A method as claimed in claim 2 in which when said difference ε is smaller than said threshold value, the estimation of the approximate values of Δf O and θ O is refined following a repetition of said fast loop for a plurality of tours and exploiting an intermediate decision on the N bits of the preamble sequence to which, during each tour a specified number of additional decided bits are added.
Claim 9
Dependent Claim
69 words
A method as claimed in claim 2, in which when the said difference ε exceeds the said threshold value as a result of an erroneous evaluation of the bit-synchronization, said progressively refining step comprises initializing Δf 0 and θ 0 following a slow loop to re-effect the matched filtering and the estimation of the approximate values of Δf 0 and θ 0 by filtering said secondary bit-synchronization value SYNS.
Claim 10
Dependent Claim
37 words
A method as claimed in claim 2, in which the digitally modulated signals comprise signals modulated according to the GMSK, 2SRC, TFM, GTFM, . . . types of modulation, whose phase evolution law follows a progressive variation.
Claim 11
Dependent Claim
72 words
A method as claimed in claim 1 in which when said difference ε is smaller than said threshold value, the estimation of the approximate values of Δf 0 and θ 0 is refined following a repetition of said fast loop for a plurality of tours and exploiting an intermediate decision on the N bits of the preamble sequence to which, during each tour a specified number of additional decided bits are added.
Claim 12
Dependent Claim
61 words
A method as claimed in claim 10, comprising at the end of the last tour of said fast loop the additional steps of: compensating the received signal by eliminating the effect of the residual frequency offset and the initial phase, and then making a final decision step and differential decoding the compensated signal to produce a stream of transmitted binary information.
Claim 13
Dependent Claim
37 words
A method as claimed in claim 11, in which the digitally modulated signals comprise signals modulated according to the GMSK, 2SRC, TFM, GTFM, . . . types of modulation, whose phase evolution law follows a progressive variation.
Claim 14
Dependent Claim
37 words
A method as claimed in claim 10, in which the digitally modulated signals comprise signals modulated according to the GMSK, 2SRC, TFM, GTFM, . . . types of modulation, whose phase evolution law follows a progressive variation.
Claim 15
Dependent Claim
69 words
A method as claimed in claim 1, in which when the said difference ε exceeds the said threshold value as a result of an erroneous evaluation of the bit-synchronization, said progressively refining step comprises initializing Δf O and θ O following a slow loop to re-effect the matched filtering and the estimation of the approximate values of Δf O and θ O by filtering said secondary bit-synchronization value SYNS.
Claim 16
Dependent Claim
37 words
A method as claimed in claim 14, in which the digitally modulated signals comprise signals modulated according to the GMSK, 2SRC, TFM, GTFM, . . . types of modulation, whose phase evolution law follows a progressive variation.
Claim 17
Dependent Claim
37 words
A method as claimed in claim 1, in which the digitally modulated signals comprise signal modulated according to the GMSK, 2SRC, TFM, GTFM, . . . types of modulation, whose phase evolution law follows a progressive variation.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1995-09-29 | 1996-03-30 | 1996-09-29 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1999-09-29 | 2000-03-30 | 2000-09-29 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2003-09-29 | 2004-03-30 | 2004-09-29 | $7700.00 | Window Closed / Lapsed |