Trap circuit comprising plural piezoelectric resonators interconnected by plural resistors and an inductor

Claim 1

A trap circuit for eliminating unwanted signals with specific frequencies from an incoming signal, said trap circuit comprising: an input end through which said incoming signal is received; an output end; a plurality of three-terminal piezoelectric ceramic resonators each having an input terminal, an output terminal and a grounded common terminal, each of said resonators having a different resonance frequency, the input and output terminals of said resonators being coupled in cascade between said input and output ends; an input-end parallel resistor connecting said input end with said grounded common terminals; an input-end series resistor connecting said input end with the input terminal of one of said resonators; an output-end parallel resistor connecting said output end with said grounded common terminals; one or more inter-resonator resistors; one or more inter-terminal resistors; and an inductor; one of said plurality of resonators having a lowest resonance frequency and having said inductor connected between its input and output terminals, the rest of said resonators each having one of said inter-terminal resistors connected between its input and output terminals, the input and output terminals of each mutually adjacent pair of said resonators being connected by one of said inter-resonator resistors.