US5148334A
Expired / Lapsed
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Phase synchronization circuit
Assignee: Hitachi Ltd
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Filing: 1989-12-01
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Granted: 1992-09-15
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Expires: 2009-12-01
Abstract
Abstract Every other input pulse is extracted from an input signal containing alternate phase-advanced and phase-delayed pulses read out of a magnetic disk unit, a magnetic tape unit or the like. Output pulses in synchronism with the pulses thus extracted are produced. This extraction may be effected only during a predetermined length of time after staring application of the input pulses at the time of pull-in of a phase sync circuit. Whether phase synchronization is to be effected in accordance with advanced-phase or delayed-phase input pulses is determined from time to time as required.
Inventors
- 👤 Takikazu Takeuchi
- 👤 Hiroyuki Yokohara
- 👤 Takuji Ogawa
- 👤 Noboru Sakurai
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-31 23:46
CPC Classifications
G; G11; G11B; G11B20/00; G11B20/10; G11B20/10009; G11B20/10222; G11B20/14; G11B20/1403
Claims Analysis
Total Claims: 7
Claim 1
Independent Claim
102 words
A phase sync circuit comprising: means for extracting every other pulse of an input pulse signal containing alternate phase-advanced and phase-delayed pulses; means for correcting the phase of an output pulse in accordance with a phase difference signal and for generating an output pulse in phase with the input pulse signal; and means, connected to the extraction means and the output pulse generation means, for comparing the phase of the pulse extracted by the extraction means with that of the output pulse produced from the output pulse generation means and generating a phase difference signal in accordance with the result of comparison.
Claim 2
Dependent Claim
102 words
A phase sync circuit comprising: means for extracting every other pulse of an input pulse signal containing alternate phase-advanced and phase-delayed pulses; means for correcting the phase of an output pulse in accordance with a phase difference signal and for generating an output pulse in phase with the input pulse signal; and means, connected to the extraction means and the output pulse generation means, for comparing the phase of the pulse extracted by the extraction means with that of the output pulse produced from the output pulse generation means and generating a phase difference signal in accordance with the result of comparison.
Claim 3
Dependent Claim
138 words
A phase sync circuit comprising: means for extracting every other pulse of an input pulse signal containing alternate phase-advanced and phase-delayed pulses; means for correcting the phase of an output pulse in accordance with a phase difference signal and for generating an output pulse in phase with the input pulse signal; and means, connected to the extraction means and the output pulse generation means, for comparing the phase of the pulse extracted by the extraction means with that of the output pulse produced from the output pulse generation means and generating a phase difference signal in accordance with the result of comparison; wherein said extraction means includes a circuit adapted to operate for extraction only during a predetermined length of time after application thereto of the input pulse at the time of pull-in of the phase sync circuit.
Claim 4
Dependent Claim
138 words
A phase sync circuit comprising: means for extracting every other pulse of an input pulse signal containing alternate phase-advanced and phase-delayed pulses; means for correcting the phase of an output pulse in accordance with a phase difference signal and for generating an output pulse in phase with the input pulse signal; and means, connected to the extraction means and the output pulse generation means, for comparing the phase of the pulse extracted by the extraction means with that of the output pulse produced from the output pulse generation means and generating a phase difference signal in accordance with the result of comparison; wherein said extraction means includes a circuit adapted to operate for extraction only during a predetermined length of time after application thereto of the input pulse at the time of pull-in of the phase sync circuit.
Claim 5
Dependent Claim
45 words
A phase sync circuit according to claim 2, wherein the circuit adapted to operate for extraction only during a predetermined length of time includes a circuit for determining selected one of advanced-phase and delayed-phase input pulses in accordance with which phase is to be synchronized.
Claim 6
Dependent Claim
142 words
A phase sync circuit comprising: a read data control circuit adapted to periodically extract non-adjacent pulses of an input pulse signal, containing alternate phase-advanced and phase-delayed pulses, read from a recording medium; a voltage-controlled oscillator generating an output pulse in synchronism with said input pulse by changing an oscillation frequency of the oscillator in accordance with a voltage of a smoothed phase difference signal; a phase comparator connected to the read data control circuit and the voltage-controlled oscillator and comparing the phase of the pulse extracted by the read data control circuit with that of an output pulse of the voltage-controlled oscillator and generating a phase difference signal having a voltage corresponding to a result of the comparison; and a low-pass filter inserted between the phase comparator and the voltage-controlled oscillator, receiving phase difference signal and producing said smoothed phase difference signal.
Claim 7
Dependent Claim
142 words
A phase sync circuit comprising: a read data control circuit adapted to periodically extract non-adjacent pulses of an input pulse signal, containing alternate phase-advanced and phase-delayed pulses, read from a recording medium; a voltage-controlled oscillator generating an output pulse in synchronism with said input pulse by changing an oscillation frequency of the oscillator in accordance with a voltage of a smoothed phase difference signal; a phase comparator connected to the read data control circuit and the voltage-controlled oscillator and comparing the phase of the pulse extracted by the read data control circuit with that of an output pulse of the voltage-controlled oscillator and generating a phase difference signal having a voltage corresponding to a result of the comparison; and a low-pass filter inserted between the phase comparator and the voltage-controlled oscillator, receiving phase difference signal and producing said smoothed phase difference signal.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1995-09-15 | 1996-03-16 | 1996-09-15 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1999-09-15 | 2000-03-16 | 2000-09-15 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2003-09-15 | 2004-03-16 | 2004-09-15 | $7700.00 | Window Closed / Lapsed |