Current generating device for complementarily generating two currents of different magnitudes in response to one-bit data

Claim 2

A current generating device for complementarily generating two different currents having different magnitudes in response to one-bit data, comprising: constant current generating means for generating a current having a predetermined magnitude; first and second switching means for complementarily generating an ON state which allows passage of the current with the predetermined magnitude generated by said constant current generating means and an OFF state which prevents the passage of the current with the predetermined magnitude; first control signal generating means for generating a first control signal for turning on said first and second switching means; second control signal generating means for generating a second control signal of a level substantially equal to a cutoff voltage at which said first and second switching means can be turned off; supply means responsive to said one-bit data for complementarily applying said first and second control signals generated by said first and second control signal generating means to said first and second switching means; and first and second output means for outputting respective currents from said first and second switching means, respectively.

Claim 3

The current generating device according to claim 1, wherein said predetermined-magnitude current is a current flowing when said constant current generating means is in an ON state; and, said constant current generating means comprises current control means turned on in response to said first control signal or a supply potential signal, said current control means including: a first conduction terminal connected to said first and second switching means, a second conduction terminal coupled to a ground potential, and a control terminal supplied with said first control signal or said supply potential signal; said first switching means including: a first conduction terminal connected to said constant current generating means, a second conduction terminal connected to said first output means, and a control terminal supplied with said first or second control signal; said second switching means including: a first conduction terminal connected to said constant current generating means, a second conduction terminal connected to said second output means, and a control terminal supplied with said first or second control signal.

Claim 4

The current generating device according to claim 2, wherein said current control means and said first and second switching means include a field effect transistor; and said first control signal attains a higher potential than a threshold voltage of said field effect transistor, and said second control signal attains a potential between the threshold voltage of said field effect transistor and a ground potential.

Claim 5

The current generating device according to claim 2, wherein said current control means and said first and second switching mean include a bipolar transistor; and said first control signal attains a higher potential than a potential between a base and an emitter of said bipolar transistor, and said second control signal attains a potential between the base-emitter potential of said bipolar transistor and the ground potential.

Claim 6

A current generating device for complementarily generating two different currents having different magnitudes in response to one-bit data, comprising: constant current generating means for generating a current having a predetermined magnitude; first and second switching means for complementarily generating an ON state which allows passage of the current with the predetermined magnitude generated by said constant current generating means and an OFF state which prevents the passage of the current with the predetermined magnitude; first control signal generating means for generating a first control signal for turning on said first or second switching means; second control signal generating means for generating a second control signal of a level in a predetermined range in which said first or second control signal generating means to said first and second switching means can be turned off; supply means responsive to said one-bit data for complementarily applying said first and second control signals generated by said first and second switching means; and first and second output means for outputting respective currents from said first and second switching means, respectively; wherein said first control signal generating means includes a first control signal output terminal coupled to a supply potential, and said second control signal generating means includes voltage dividing means for dividing a supply voltage to set the level of a second control signal to be generated and buffer means for generating a second control signal corresponding to the level set by said voltage dividing means.

Claim 7

A current generating device for complementarily generating two different currents having different magnitudes in response to one-bit data, comprising: constant current generating means for generating a current having a predetermined magnitude; first and second switching means for complementarily generating an ON state which allows passage of the current with the predetermined magnitude generated by said constant current generating means and an OFF state which prevents the passage of the current with the predetermined magnitude; first control signal generating means for generating a first control signal for turning on said first or second switching means; second control signal generating means for generating a second control signal of a level in a predetermined range in which said first or second control signal generating means to said first and second switching means can be turned off; supply means responsive to said one-bit data for complementarily applying said first and second control signals generated by said first and second switching means; and first and second output means for outputting respective currents from said first and second switching means, respectively; wherein said first control signal generating means includes a first control signal output terminal coupled to a supply potential, and said second control signal generating means includes voltage dividing means for dividing a supply voltage to set the level of a second control signal to be generated and buffer means for generating a second control signal corresponding to the level set by said voltage dividing means.

Claim 8

The current generating device according to claim 5, wherein said voltage dividing means includes first and second current control means connected in series between the supply potential and the ground potential, said first and second current control means having respective internal resistances controlled in response to externally applied signals.

Claim 9

The current generating device according to claim 5, wherein said voltage dividing means includes a plurality of resistor means connected in series between the supply potential and the ground potential.

Claim 10

The current generating device according to claim 5, wherein said voltage dividing means includes variable resistor means and a field effect transistor connected in series between the supply potential and the ground potential, said field effect transistor having a gate and a drain coupled with each other.

Claim 11

The current generating device according to claim 5, wherein said buffer means includes amplifier means for amplifying a level signal which is voltage-divided by said voltage dividing means, said amplifier means including: a positive-phase input terminal provided with the level signal set by said voltage dividing means as an input, an output terminal for outputting said second control signal, a negative-phase input terminal connected to said output terminal, and a capacitor coupled between said output terminal and a ground potential.

Claim 12

The current generating device according to claim 5, wherein said one-bit data includes two states, and said supply means includes: first path establishing means responsive to the one state of said one-bit data to become active for establishing a first path through which said first control signal and said second control signal are applied respectively to said first switching means and said second switching means; and second path establishing means responsive to the other state of said one-bit data to become active for establishing a second path through which said second control signal and said first control signal are applied respectively to said first switching means and said second switching means.

Claim 13

A D/A converter for converting digital data including a plurality of bits into complementary analog signals, comprising: a plurality of constant current generating means provided corresponding to the plurality of bits of said digital data for generating respective currents having respective predetermined magnitudes; a plurality of first and second switching means provided corresponding to said plurality of constant current generating means for complementarily generating an ON state which allows passage of the respective predetermined-magnitude currents generated by corresponding said constant current generating means and an OFF state which prevents the passage of the respective predetermined-magnitude currents; first control signal generating means for generating a first control signal to turn on said respective first and second switching means; second control signal generating means for generating a second control signal of a level in a predetermined range in which said respective first and second switching means can be turned off; a plurality of supply means provided corresponding to said plurality of bits and responsive to corresponding one bit for applying said first and second control signals generated by said first and second control signal generating means to corresponding said first and second switching means; first summation means for summing the respective current from respective said first switching means to generate an analog signal; and second summation means for summing the respective currents from respective said second switching means to generate an analog signal complementary with the analog signal generated by said first summation means.

Claim 14

A D/A converter for converting digital data including a plurality of bits into complementary analog signals, comprising: a plurality of constant current generating means provided corresponding to the plurality of bits of said digital data for generating respective currents having respective predetermined magnitudes; a plurality of first and second switching means provided corresponding to said plurality of constant current generating means for complementarily generating an ON state which allows passage of the respective predetermined-magnitude currents generated by corresponding said constant current generating means and an OFF state which prevents the passage of the respective predetermined-magnitude currents; first control signal generating means for generating a first control signal to turn on said respective first and second switching means; second control signal generating means for generating a second control signal of a level in a predetermined range in which said respective first and second switching means can be turned off; a plurality of supply means provided corresponding to said plurality of bits and responsive to corresponding one bit for applying said first and second control signals generated by said first and second control signal generating means to corresponding said first and second switching means; first summation means for summing the respective current from respective said first switching means to generate an analog signal; and second summation means for summing the respective currents from respective said second switching means to generate an analog signal complementary with the analog signal generated by said first summation means.

Claim 15

A video data/color signal converter for converting video data including a plurality of bits into complementary color signals, comprising: memory means for storing predetermined color data; timing signal generating means responsive to an externally applied pixel clock signal for generating a clock signal for an internal synchronization; address data generating means for converting said video data externally applied in parallel into serial data, to generate address data; reading means responsive to the address data generated by said address data generating means for reading said color data stored in advance; color data/color signal converting means for converting said color data read by said reading means into complementary color signals, said color data/color signal converting means including: a plurality of constant current generating means provided corresponding to a plurality of bits of said color data for generating respective currents having respective predetermined magnitudes; a plurality of first and second switching means provided corresponding to said plurality of constant current generating means for complementarily generating an ON state which allows passage of the respective predetermined-magnitude currents generated by corresponding said constant current generating means and an OFF state which prevents the passage of the respective predetermined-magnitude currents; first control signal generating means for generating a first control signal for turning on said respective first and second switching means; second control signal generating means for generating a second control signal of a level in a predetermined range in which said respective first and second switching means can be turned off; a plurality of supplying means provided corresponding to said plurality of bits and responsive to corresponding one bit for applying said first and second control signal generated by said first and second control signal generating means to corresponding said first and second switching means; first summation means for summing respective currents from respective said first switching means to generate a color signal; and second summation means for summing respective currents from respective said second switching means to generate a color signal complementary with the color signal generated by said first summation means.

Claim 16

A video data/color signal converter for converting video data including a plurality of bits into complementary color signals, comprising: memory means for storing predetermined color data; timing signal generating means responsive to an externally applied pixel clock signal for generating a clock signal for an internal synchronization; address data generating means for converting said video data externally applied in parallel into serial data, to generate address data; reading means responsive to the address data generated by said address data generating means for reading said color data stored in advance; color data/color signal converting means for converting said color data read by said reading means into complementary color signals, said color data/color signal converting means including: a plurality of constant current generating means provided corresponding to a plurality of bits of said color data for generating respective currents having respective predetermined magnitudes; a plurality of first and second switching means provided corresponding to said plurality of constant current generating means for complementarily generating an ON state which allows passage of the respective predetermined-magnitude currents generated by corresponding said constant current generating means and an OFF state which prevents the passage of the respective predetermined-magnitude currents; first control signal generating means for generating a first control signal for turning on said respective first and second switching means; second control signal generating means for generating a second control signal of a level in a predetermined range in which said respective first and second switching means can be turned off; a plurality of supplying means provided corresponding to said plurality of bits and responsive to corresponding one bit for applying said first and second control signal generated by said first and second control signal generating means to corresponding said first and second switching means; first summation means for summing respective currents from respective said first switching means to generate a color signal; and second summation means for summing respective currents from respective said second switching means to generate a color signal complementary with the color signal generated by said first summation means.