US5146336A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Sync control for video overlay
Assignee: Groupe Videotron Ltd
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Filing: 1990-09-14
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Granted: 1992-09-08
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Expires: 2010-09-14
Abstract
Abstract A video sync control circuit for controlling the stable synchronization of the display of locally generated signals on a TV screen in the presence or in the absence of a received signal which includes a sync signal. The circuit is comprised of apparatus for receiving an video input signal, apparatus for detecting the presence of an input sync signal which is part of the video input signal, and the absence of the sync signal during all or part of a sync interval of the video input signal, apparatus for locally generating a replacement video signal containing a video display which extends over a predetermined time interval, which is in sync with a local clock, apparatus for phase locking the local clock with the input sync signal, and apparatus for switching the input video signal to an output line during time other than during the time interval, and switching the replacement composite video signal to the output line during the time interval.
Inventors
- 👤 Alain Tessier
- 👤 Jean P. Champagne
- 👤 Maurice Milot
- 👤 Albert Belanger
- 👤 Yves Tardif
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-06 04:58
CPC Classifications
H; H04; H04N; H04N9/00; H04N9/44; H04N5/00; H04N5/222; H04N5/262
Claims Analysis
Total Claims: 10
Claim 1
Independent Claim
129 words
A video sync control circuit comprising: (a) means for receiving an video input signal, (b) means for detecting the presence of an input sync signal which is part of the video input signal, and the absence of said sync signal during all or part of a sync interval of said video input signal, (c) means for locally generating a replacement video signal containing a video display which extends over a predetermined time interval, which is in sync with a local clock, (d) means for phase locking the local clock with the input sync signal, (e) means for switching the input video signal to an output line during time other than during said time interval, and switching the replacement composite video signal to the output line during said time interval.
Claim 2
Dependent Claim
129 words
A video sync control circuit comprising: (a) means for receiving an video input signal, (b) means for detecting the presence of an input sync signal which is part of the video input signal, and the absence of said sync signal during all or part of a sync interval of said video input signal, (c) means for locally generating a replacement video signal containing a video display which extends over a predetermined time interval, which is in sync with a local clock, (d) means for phase locking the local clock with the input sync signal, (e) means for switching the input video signal to an output line during time other than during said time interval, and switching the replacement composite video signal to the output line during said time interval.
Claim 3
Dependent Claim
92 words
A control circuit as defined in claim 1, further including means for locally generating a sync signal, means for phase-locking the local clock with the locally generated sync signal, means for generating a sync absent signal upon the detection of the absence of said sync signal as part of the input video signal, means for generating a window signal in the presence of and for the period of the sync absent signal, and means for switching the replacement composite video signal to the output line during the interval of the window signal.
Claim 4
Dependent Claim
50 words
A control circuit as defined in claim 2, further including means for locally generating a sync signal, means for phase locking the local clock with the locally generated sync signal, and means for switching the replacement composite video signal to the output line during the interval of the window signal.
Claim 5
Dependent Claim
156 words
A control circuit as defined in claim 1 in which the means for phase locking the local clock is comprised of first and second phase locked loops, means for applying every second equalization pulse of the input sync signal to the first phase locked loop to synchronize the first phase locked loop therewith and to form a loop signal which is a stable horizontal sync frequency signal, the second phase locked loop being coupled to the first phase locked loop for receiving the stable horizontal sync frequency signal as an input thereto, means for applying a clock signal from the local replacement video signal generating means to the second phase locked loop for synchronizing the clock signal to the stable horizontal sync frequency signal, and means for supplying the synchronized clock signal to the local replacement video signal generating means, whereby the local replacement video signal generating means clock is synchronized to the input sync signal.
Claim 6
Dependent Claim
153 words
A control circuit as defined in claim 3, in which the means for phase locking the local clock is comprised of first and second phase locked loops, means for applying the locally generated sync signal to the first phase locked loop to synchronize the first phase locked loop therewith and to form a loop signal which is a stable horizontal sync frequency signal, the second phase locked loop being coupled to the first phase locked loop for receiving the stable horizontal sync frequency signal as an input thereto, means for applying a clock signal from the local replacement video signal generating means to the second phase locked loop for synchronizing the clock signal to the stable horizontal sync frequency signal, and means for supplying the synchronized clock signal to the local replacement video signal generating means, whereby the local replacement video signal generating means clock is synchronized to the locally generated sync signal.
Claim 7
Dependent Claim
131 words
A circuit as defined in claim 4 in which the second phase locked loop is comprised of a voltage controlled oscillator operating at a frequency of 8 times a standard NTSC colour burst frequency, and a divider connected in series therewith having a division parameter of 1820, the output of the divider being connected to an input of a phase comparator, the output of the phase comparator being connected to a control input of the voltage controlled oscillator, an output signal of the first phase locked loop at an NTSC horizontal sync frequency being connected to another input of the phase comparator, the output signal of the divider being provided as the stable horizontal sync signal and the output signal of the voltage controlled oscillator being provided as the clock signal.
Claim 8
Dependent Claim
155 words
A circuit as defined in claim 4 in which the second phase locked loop is comprised of a voltage controlled oscillator operating at a frequency of a multiple of a standard television system colour burst frequency, and a divider connected in series therewith having a division parameter such as to produce an output signal of the divider which is a standard horizontal frequency of the television system, the output signal of the divider being connected to an input of a phase comparator, the output of the phase comparator being connected to a control input of the voltage controlled oscillator, an output signal of the first phase locked loop at a horizontal sync frequency of said television system being connected to another input of the phase comparator, the output signal of the divider being provided as the stable horizontal sync signal and the output signal of the voltage controlled oscillator being provided as the clock signal.
Claim 9
Dependent Claim
131 words
A circuit as defined in claim 5 in which the second phase locked loop is comprised of a voltage controlled oscillator operating at a frequency of 8 times a standard NTSC colour burst frequency, and a divider connected in series therewith having a division parameter of 1820, the output of the divider being connected to an input of a phase comparator, the output of the phase comparator being connected to a control input of the voltage controlled oscillator, an output signal of the first phase locked loop at an NTSC horizontal sync frequency being connected to another input of the phase comparator, the output signal of the divider being provided as the stable horizontal sync signal and the output signal of the voltage controlled oscillator being provided as the clock signal.
Claim 10
Dependent Claim
155 words
A circuit as defined in claim 5 in which the second phase locked loop is comprised of a voltage controlled oscillator operating at a frequency of a multiple of a standard television system colour burst frequency, and a divider connected in series therewith having a division parameter such as to produce an output signal of the divider which is a standard horizontal frequency of the television system, the output signal of the divider being connected to an input of a phase comparator, the output of the phase comparator being connected to a control input of the voltage controlled oscillator, an output signal of the first phase locked loop at an horizontal sync frequency of said television system being connected to another input of the phase comparator, the output signal of the divider being provided as the stable horizontal sync signal and the output signal of the voltage controlled oscillator being provided a the clock signal.
References Cited (Backward Citations)
US4992872A
Cited
US4639765A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1995-09-08 | 1996-03-09 | 1996-09-08 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1999-09-08 | 2000-03-09 | 2000-09-08 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2003-09-08 | 2004-03-09 | 2004-09-08 | $7700.00 | Window Closed / Lapsed |