Abstract The solid state imaging device having an array of bit units formed in a semiconductor substrate. Each bit unit is comprised of a phototransistor having a collector formed of the semiconductor substrate an emitter and a base, a switching transistor of the MOS type having a drain connected to the emitter of the phototransistor, an initializing transistor of the MOS type having a drain connected to the base of the phototransistor, a source receptive of a first reference voltage, and a gate connected to the emitter of the phototransistor, and a resetting transistor of the MOS type having a drain connected to the emitter of the phototransistor, a source receptive of a second reference voltage, and a gate receptive of a reset signal. The resetting transistor operates in the reset signal to enable the initializing transistor to initialize the phototransistor. The switching transistor drives the initialized phototransistor to effect reading of image.
Inventors
👤 Yukito Kawahara
👤 Satoshi Machida
👤 Hiroshi Mukainakano
👤 Masahiro Yokomichi
Bibliographic Details
Application Number—
JurisdictionUS
Data Sourcegoogle_patents
Last Synchronized2026-11-08 11:28
CPC Classifications
H; H04; H04N; H04N25/00; H04N25/70; H04N25/76
Claims Analysis
Total Claims: 4
Claim 1
Independent Claim
121 words
A solid state imaging device having an array of bit units formed in a semiconductor substrate, each bit unit comprising: a phototransistor having a collector, an emitter and a base formed of the semiconductor substrate; a switching transistor of the MOS type having a drain connected to the emitter of the phototransistor; an initializing transistor of the MOS type having a drain connected to the base of the phototransistor, a source receptive of a first reference voltage, and a gate connected to the emitter of the phototransistor; and a resetting transistor of the MOS type having a drain connected to the emitter of the phototransistor, a source receptive of a second reference voltage, and a gate receptive of a reset signal.
Claim 2
Dependent Claim
121 words
A solid state imaging device having an array of bit units formed in a semiconductor substrate, each bit unit comprising: a phototransistor having a collector, an emitter and a base formed of the semiconductor substrate; a switching transistor of the MOS type having a drain connected to the emitter of the phototransistor; an initializing transistor of the MOS type having a drain connected to the base of the phototransistor, a source receptive of a first reference voltage, and a gate connected to the emitter of the phototransistor; and a resetting transistor of the MOS type having a drain connected to the emitter of the phototransistor, a source receptive of a second reference voltage, and a gate receptive of a reset signal.
Claim 3
Dependent Claim
38 words
A solid state imaging device according to claim 1; including a shift register for applying a reset pulse to the gate of the resetting transistor to drive the initializing transistor to enable the same to initialize the phototransistor.
Claim 4
Dependent Claim
39 words
A solid state imaging device according to claim 2; wherein the shift register includes means for applying a selection signal to the switching transistor to enable the same to drive the initialized phototransistor to effect detection of an image.