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US5144405A Expired / Lapsed US ⏱️ 0.0 years remaining

Temperature compensation apparatus for logic gates

Assignee: Frontgrade Technologies Inc
•
Filing: 1991-08-13
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Granted: 1992-09-01
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Expires: 2011-08-13
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Abstract

Abstract A temperature compensation circuit enables the reliable operation of semiconductor logic gates over wide temperature ranges. The temperature compensation circuit includes a thin film resistor in series with an implanted resistor, both located on the same semiconductor substrate and both having one terminal connected together. The other terminal of one of the resistors is coupled to a point of reference potential, while the other terminal of the other resistor is coupled to an operating potential. A voltage is provided at the junction between the two resistors, which voltage is coupled to the logic gates. The voltage serves as a pull-down source and tracks over the wide temperature range to enable the logic gate to reliably operate with an adequate noise margin over temperature ranges between -55° C. to +125° C.

Inventors

  • 👤 John F. Naber

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-04 19:39
CPC Classifications
H; H10; H10D; H10D89/00; H10D89/10; H10D89/105

Claims Analysis

Total Claims: 22
Claim 1
Independent Claim 76 words
A temperature compensation apparatus for supplying a compensated potential enabling semiconductor integrated circuit logic gates formed on an IC substrate to be biased to exhibit adequate noise margin operation over a wide temperature range, comprising: a voltage divider located on said substrate and formed by the series combination of a first thin film resistor and a second implanted resistor, with the common terminal between said resistors coupled to at least one logic gate on said substrate.
Claim 2
Dependent Claim 76 words
A temperature compensation apparatus for supplying a compensated potential enabling semiconductor integrated circuit logic gates formed on an IC substrate to be biased to exhibit adequate noise margin operation over a wide temperature range, comprising: a voltage divider located on said substrate and formed by the series combination of a first thin film resistor and a second implanted resistor, with the common terminal between said resistors coupled to at least one logic gate on said substrate.
Claim 3
Dependent Claim 21 words
The apparatus according to claim 1, wherein the other terminal of said first resistor is coupled to a source of potential.
Claim 4
Dependent Claim 22 words
The apparatus according to claim 2, wherein the other terminal of said second resistor is coupled to a point of reference potential.
Claim 5
Dependent Claim 29 words
The apparatus according to claim 1, wherein the temperature coefficient of resistance (TCR) of said second resistor is about 100 times greater than the TCR of said first resistor.
Claim 6
Dependent Claim 20 words
The apparatus according to claim 1, wherein said substrate is fabricated from GaAs and said logic gates are MESFET gates.
Claim 7
Dependent Claim 15 words
The apparatus according to claim 5, wherein said first resistor is fabricated from tungsten nitride.
Claim 8
Dependent Claim 15 words
The apparatus according to claim 6, wherein said second resistor is an ion implanted resistor.
Claim 9
Dependent Claim 11 words
The apparatus according to claim 1, wherein said substrate is silicon.
Claim 10
Dependent Claim 14 words
The apparatus according to claim 8, wherein said logic gates are bipolar transistor gates.
Claim 11
Dependent Claim 13 words
The apparatus according to claim 8, wherein said logic gates are MOSFET gates.
Claim 12
Dependent Claim 15 words
The apparatus according to claim 5, wherein said MESFET gates are direct coupled logic gates.
Claim 13
Dependent Claim 18 words
The apparatus according to claim 1, wherein said wide temperature range is from -55° C. to +125° C.
Claim 14
Dependent Claim 113 words
Temperature compensation apparatus for supplying a compensated potential which tracks over a wide temperature range to enable semiconductor integrated circuit logic gates formed on a substrate to be biased with said potential to exhibit adequate noise margin operation over said range, comprising: a voltage divider formed on said substrate from a first resistor in series with a second resistor with said first resistor having a temperature coefficient of resistance (TCR) of about 100 times greater than said second resistor, to provide a compensated potential at the junction between said resistors when an operating potential is applied between said divider and with said junction coupled to at least one logic gate on said substrate.
Claim 15
Dependent Claim 113 words
Temperature compensation apparatus for supplying a compensated potential which tracks over a wide temperature range to enable semiconductor integrated circuit logic gates formed on a substrate to be biased with said potential to exhibit adequate noise margin operation over said range, comprising: a voltage divider formed on said substrate from a first resistor in series with a second resistor with said first resistor having a temperature coefficient of resistance (TCR) of about 100 times greater than said second resistor, to provide a compensated potential at the junction between said resistors when an operating potential is applied between said divider and with said junction coupled to at least one logic gate on said substrate.
Claim 16
Dependent Claim 23 words
The apparatus according to claim 3, wherein said first resistor is an implanted resistor with said second resistor being a thin film resistor.
Claim 17
Dependent Claim 13 words
The apparatus according to claim 14, wherein said first resistor is ion implanted.
Claim 18
Dependent Claim 15 words
The apparatus according to claim 15, wherein said second resistor is evaporated on said substrate.
Claim 19
Dependent Claim 11 words
The apparatus according to claim 14, wherein said substrate is GaAs.
Claim 20
Dependent Claim 14 words
The apparatus according to claim 17, wherein said logic gate is a MESFET gate.
Claim 21
Dependent Claim 15 words
The apparatus according to claim 14, wherein said second resistor is formed from tungsten nitride.
Claim 22
Dependent Claim 20 words
The apparatus according to claim 13, wherein said substrate is silicon and said logic gate is a bipolar transistor gate.

References Cited (Backward Citations)

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USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1995-09-01 1996-03-02 1996-09-01 $2000.00 Window Closed / Lapsed
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