US5143820A
Expired / Lapsed
US
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Method for fabricating high circuit density, self-aligned metal linens to contact windows
Assignee: International Business Machines Corp
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Filing: 1991-07-11
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Granted: 1992-09-01
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Expires: 2011-07-11
Abstract
Abstract A method is disclosed for fabricating patterned conductive lines which are self-aligned with underlying contacts windows. A layer of a photosensitive material such photoresist is formed over a dielectric layer. The photoresist layer is processed to have fully developed areas corresponding to contact windows, partially developed areas corresponding to the patterned conductive lines and undeveloped areas which correspond to field areas where the entire dielectric layer is maintained. The dielectric layer is preferably a compound dielectric layer to reduce interlevel shorts. Through the use of selective etch steps, the compound dielectric layers aid in the formation of the patterned conductive line and contact window structure. A series of reactive ion etch (RIE) steps are performed. The first RIE step, highly selective to dielectric material as compared to photoresist, etches the fully developed areas at least partially through the dielectric thickness. In the second RIE step, the photoresist which protected dielectric in the conductive line areas is removed. The third RIE step is also selective to dielectric material as compared to photoresist and etches the dielectric to form channels where the conductive lines are formed, and completes the etching in the contact window areas. The remaining resist is then removed. The channels and contacts are overfilled with a deposition of a conductive material. This conductive material is then planarized by either a RIE process or a chemical-mechanical polishing step.
Inventors
- 👤 Harish N. Kotecha
- 👤 Hans A. Protschka
- 👤 Dave Stanasolovich
- 👤 Jake Theisen
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-06 16:19
CPC Classifications
H; H10; H10W; H10W20/00; H10W20/01; H10W20/031; H10W20/062; H10W20/071; H10W20/081
Claims Analysis
Total Claims: 30
Claim 1
Independent Claim
198 words
A method for fabricating a patterned conductive layer self-aligned to underlying contact windows in a dielectric layer on a substrate comprising the steps of: forming a photosensitive layer over said dielectric layer, said photosensitive layer having full height areas, partial height areas and no height areas over said dielectric layer, wherein said no height areas and said partial height areas are aligned to each other; in a first etching step, selectively etching said dielectric layer in said no height areas where said photosensitive layer is substantially totally removed to form contact windows which at least partially penetrate said dielectric layer; in a second etching step, selectively etching to remove said partial height areas of photosensitive layer; in a third etching step, etching said dielectric layer in said partial height areas to a predetermined depth to form channels for said patterned conductive layer, and in said no height areas entirely through said dielectric layer to form contact windows to said substrate; depositing a conductive material over said dielectric layer; and, planarizing said conductive layer to remove excess amounts of said conductive layer from said dielectric layer; wherein said second and third etching steps sequentially follow the previous etching step.
Claim 2
Independent Claim
198 words
A method for fabricating a patterned conductive layer self-aligned to underlying contact windows in a dielectric layer on a substrate comprising the steps of: forming a photosensitive layer over said dielectric layer, said photosensitive layer having full height areas, partial height areas and no height areas over said dielectric layer, wherein said no height areas and said partial height areas are aligned to each other; in a first etching step, selectively etching said dielectric layer in said no height areas where said photosensitive layer is substantially totally removed to form contact windows which at least partially penetrate said dielectric layer; in a second etching step, selectively etching to remove said partial height areas of photosensitive layer; in a third etching step, etching said dielectric layer in said partial height areas to a predetermined depth to form channels for said patterned conductive layer, and in said no height areas entirely through said dielectric layer to form contact windows to said substrate; depositing a conductive material over said dielectric layer; and, planarizing said conductive layer to remove excess amounts of said conductive layer from said dielectric layer; wherein said second and third etching steps sequentially follow the previous etching step.
Claim 3
Dependent Claim
50 words
The method as recited in claim 1 wherein said dielectric layer is a compound dielectric layer formed from a first layer of a first dielectric material, a first layer of a second dielectric material, a second layer of said first dielectric material and second layer of said second dielectric material.
Claim 4
Dependent Claim
41 words
The method as recited in claim 2 wherein said first and second layers of said first dielectric material function as etch stop barriers, and said predetermined depth is equal to the thickness of said second layer of said second dielectric material.
Claim 5
Dependent Claim
23 words
The method as recited in claim 2 wherein said first dielectric material is silicon nitride and said second dielectric material is silicon oxide.
Claim 6
Dependent Claim
14 words
The method as recited in claim 1 wherein said conductive layer is a metal.
Claim 7
Dependent Claim
15 words
The method as recited in claim 1 wherein said conductive material is a compound metal.
Claim 8
Dependent Claim
16 words
The method as recited in claim 1 wherein said photosensitive layer is a positive photoresist layer.
Claim 9
Independent Claim
248 words
A method for fabricating conductive lines self-aligned to underlying contact windows in a dielectric layer over a semiconductor substrate, comprising the steps of: forming an etch stop layer over said substrate; forming a dielectric layer over said substrate; forming a photoresist layer having no height areas in the pattern of said contacts, partial height areas in the pattern of said conductive lines and full height areas over said dielectric layer, wherein said no height areas and said partial height areas are aligned to each other; in a first etching step, selectively etching said dielectric layer in said areas where said photoresist is totally removed to form contact windows which at least partially penetrate said dielectric layer; in a second etching step, selectively etching away said partial height areas of photoresist; in a third etching step, etching said dielectric layer in said partial height areas to a predetermined depth to form channels for said conductive lines, and in said no height areas where said photoresist was fully developed entirely through said dielectric layer to form contacts to said semiconductor substrate; in a fourth etching step, etching through said etch stop layer where said contact windows are formed to contact with said semiconductor substrate; depositing a conductive layer over said dielectric layer, filling said contact windows and channels; and, planarizing said conductive layer to selectively remove excess amounts of said conductive layer from said dielectric layer; wherein said second, third and fourth etching steps sequentially follow the previous etching step.
Claim 10
Independent Claim
248 words
A method for fabricating conductive lines self-aligned to underlying contact windows in a dielectric layer over a semiconductor substrate, comprising the steps of: forming an etch stop layer over said substrate; forming a dielectric layer over said substrate; forming a photoresist layer having no height areas in the pattern of said contacts, partial height areas in the pattern of said conductive lines and full height areas over said dielectric layer, wherein said no height areas and said partial height areas are aligned to each other; in a first etching step, selectively etching said dielectric layer in said areas where said photoresist is totally removed to form contact windows which at least partially penetrate said dielectric layer; in a second etching step, selectively etching away said partial height areas of photoresist; in a third etching step, etching said dielectric layer in said partial height areas to a predetermined depth to form channels for said conductive lines, and in said no height areas where said photoresist was fully developed entirely through said dielectric layer to form contacts to said semiconductor substrate; in a fourth etching step, etching through said etch stop layer where said contact windows are formed to contact with said semiconductor substrate; depositing a conductive layer over said dielectric layer, filling said contact windows and channels; and, planarizing said conductive layer to selectively remove excess amounts of said conductive layer from said dielectric layer; wherein said second, third and fourth etching steps sequentially follow the previous etching step.
Claim 11
Dependent Claim
42 words
The method as recited in claim 8 wherein said dielectric layer is a compound dielectric layer formed from a first layer of a first dielectric material, a layer of a second dielectric material and a second layer of said first dielectric material.
Claim 12
Dependent Claim
21 words
The method as recited in claim 9 wherein said layer of said second dielectric material functions as an etch stop barrier.
Claim 13
Dependent Claim
23 words
The method as recited in claim 9 wherein said first dielectric material is silicon oxide and said second dielectric material is silicon nitride.
Claim 14
Dependent Claim
14 words
The method as recited in claim 8 wherein said conductive layer is a metal.
Claim 15
Dependent Claim
231 words
The method as recited in claim 8 which further comprises the steps of: forming a second dielectric layer over said planarized conductive layer; forming a second photoresist layer having no height areas in a second pattern of contact windows, partial height areas in a second pattern of conductive lines and full height areas over said second dielectric layer, wherein said no height areas and said partial height areas are aligned to each other; in a fifth etching step, selectively etching said second dielectric layer in said no height areas where said second photoresist layer is totally removed to form contact windows which at least partially penetrate said dielectric layer; in a sixth etching step, selectively etching away said partial height areas of said second photoresist layer; in a seventh etching step, etching said second dielectric layer in said partial height areas to a predetermined depth to form channels for said conductive lines, and in said no height areas entirely through said dielectric layer to form contact windows which connect to said planarized conductive layer; depositing a second conductive layer over said second dielectric layer, filling said contact windows and channels; and, planarizing said second conductive layer to selectively remove excess amount of said second conductive layer from said second dielectric layer to form a second planarized conductive layer; wherein said sixth and seventh etching steps sequentially follow the previous etching step.
Claim 16
Independent Claim
274 words
A method for fabricating a patterned conductive layer self-aligned to underlying contact windows in a dielectric layer on a substrate comprising the steps of: depositing a photosensitive layer over said dielectric layer; exposing a first set of areas of said photosensitive layer with an optical stepper using a first reticle, and exposing a second set of areas of said photosensitive layer with a optical stepper using a second reticle, using dosage levels chosen so that said first set of areas are fully exposed and said second set of areas are partially exposed, and said first and second sets of areas are self-aligned to each other; developing said photosensitive layer so that said first set of areas has no photosensitive layer, said second set of areas has a partial height of a photosensitive layer and a third set of areas has a full photosensitive layer; in a first etching step, selectively etching said dielectric layer in said first set of areas to form said contact windows which at least partially penetrate said dielectric layer; in a second etching step, selectively etching away said second set of areas of said photosensitive layer; in a third etching step, etching said dielectric layer in said second set of areas to a predetermined depth to form channels for said patterned conductive layer, and in said first set of areas entirely through said dielectric layer to form contact windows to said substrate; depositing a conductive material over said dielectric layer; and, planarizing said conductive layer to remove excess amounts of said conductive layer from said dielectric layer; wherein said second and third etching steps sequentially follow the previous etching step.
Claim 17
Independent Claim
274 words
A method for fabricating a patterned conductive layer self-aligned to underlying contact windows in a dielectric layer on a substrate comprising the steps of: depositing a photosensitive layer over said dielectric layer; exposing a first set of areas of said photosensitive layer with an optical stepper using a first reticle, and exposing a second set of areas of said photosensitive layer with a optical stepper using a second reticle, using dosage levels chosen so that said first set of areas are fully exposed and said second set of areas are partially exposed, and said first and second sets of areas are self-aligned to each other; developing said photosensitive layer so that said first set of areas has no photosensitive layer, said second set of areas has a partial height of a photosensitive layer and a third set of areas has a full photosensitive layer; in a first etching step, selectively etching said dielectric layer in said first set of areas to form said contact windows which at least partially penetrate said dielectric layer; in a second etching step, selectively etching away said second set of areas of said photosensitive layer; in a third etching step, etching said dielectric layer in said second set of areas to a predetermined depth to form channels for said patterned conductive layer, and in said first set of areas entirely through said dielectric layer to form contact windows to said substrate; depositing a conductive material over said dielectric layer; and, planarizing said conductive layer to remove excess amounts of said conductive layer from said dielectric layer; wherein said second and third etching steps sequentially follow the previous etching step.
Claim 18
Dependent Claim
50 words
The method as recited in claim 14 wherein said dielectric layer is a compound dielectric layer formed from a first layer of a first dielectric material, a first layer of a second dielectric material, a second layer of said first dielectric material and second layer of said second dielectric material.
Claim 19
Dependent Claim
41 words
The method as recited in claim 15 wherein said first and second layers of said first dielectric material function as etch stop barriers, and said predetermined depth is equal to the thickness of said second layer of said second dielectric material.
Claim 20
Dependent Claim
23 words
The method as recited in claim 15 wherein said first dielectric material is silicon nitride and said second dielectric material is silicon oxide.
Claim 21
Dependent Claim
14 words
The method as recited in claim 14 wherein said conductive layer is a metal.
Claim 22
Dependent Claim
15 words
The method as recited in claim 14 wherein said conductive material is a compound metal.
Claim 23
Dependent Claim
16 words
The method as recited in claim 14 wherein said photosensitive layer is a positive photoresist layer.
Claim 24
Independent Claim
329 words
A method for fabricating conductive lines self-aligned to underlying contact windows in a dielectric layer over a semiconductor substrate, comprising the steps of: forming an etch stop layer over said substrate; forming a dielectric layer over said substrate; depositing a photosensitive layer over said dielectric layer, exposing a first set of areas of said photosensitive layer with an optical stepper using a first reticle in the pattern of said contact windows, and exposing a second set of areas of said photosensitive layer with a optical stepper using a second reticle in the pattern of said conductive lines, using dosage levels chosen so that said first set of areas are fully exposed and said second set of areas are partially exposed, and said first and second sets of areas are self-aligned to each other; developing said photosensitive layer so that said first set of areas has no photosensitive layer, said second set of areas has a partial height of photosensitive layer and a third set of areas has a full photosensitive layer; in a first etching step, selectively etching said dielectric layer in said areas where said photoresist is fully developed to form contact windows which partially penetrate said dielectric layer; in a second etching step, selectively etching away said partially developed areas of photoresist; in a third etching step, etching said dielectric layer in said second set of areas to a predetermined depth to form channels for said conductive lines, and in said first set of areas entirely through said dielectric layer to form contacts to said semiconductor substrate; in a fourth etching step, etching through said etch stop layer at where said contact windows are formed to contact with said semiconductor substrate; depositing a conductive layer over said dielectric layer, filling said contact windows and channels; and, planarizing said conductive layer to selectively remove excess amounts of said conductive layer from said dielectric layer; wherein said second, third and fourth etching steps sequentially follow the previous etching step.
Claim 25
Independent Claim
329 words
A method for fabricating conductive lines self-aligned to underlying contact windows in a dielectric layer over a semiconductor substrate, comprising the steps of: forming an etch stop layer over said substrate; forming a dielectric layer over said substrate; depositing a photosensitive layer over said dielectric layer, exposing a first set of areas of said photosensitive layer with an optical stepper using a first reticle in the pattern of said contact windows, and exposing a second set of areas of said photosensitive layer with a optical stepper using a second reticle in the pattern of said conductive lines, using dosage levels chosen so that said first set of areas are fully exposed and said second set of areas are partially exposed, and said first and second sets of areas are self-aligned to each other; developing said photosensitive layer so that said first set of areas has no photosensitive layer, said second set of areas has a partial height of photosensitive layer and a third set of areas has a full photosensitive layer; in a first etching step, selectively etching said dielectric layer in said areas where said photoresist is fully developed to form contact windows which partially penetrate said dielectric layer; in a second etching step, selectively etching away said partially developed areas of photoresist; in a third etching step, etching said dielectric layer in said second set of areas to a predetermined depth to form channels for said conductive lines, and in said first set of areas entirely through said dielectric layer to form contacts to said semiconductor substrate; in a fourth etching step, etching through said etch stop layer at where said contact windows are formed to contact with said semiconductor substrate; depositing a conductive layer over said dielectric layer, filling said contact windows and channels; and, planarizing said conductive layer to selectively remove excess amounts of said conductive layer from said dielectric layer; wherein said second, third and fourth etching steps sequentially follow the previous etching step.
Claim 26
Dependent Claim
42 words
The method as recited in claim 21 wherein said dielectric layer is a compound dielectric layer formed from a first layer of a first dielectric material, a layer of a second dielectric material and a second layer of said first dielectric material.
Claim 27
Dependent Claim
21 words
The method as recited in claim 22 wherein said layer of said second dielectric material functions as an etch stop barrier.
Claim 28
Dependent Claim
23 words
The method as recited in claim 22 wherein said first dielectric material is silicon oxide and said second dielectric material is silicon nitride.
Claim 29
Dependent Claim
14 words
The method as recited in claim 21 wherein said conductive layer is a metal.
Claim 30
Dependent Claim
306 words
The method as recited in claim 21 which further comprises the steps of: forming a second dielectric layer over said planarized conductive layer; depositing a second photosensitive layer over said dielectric layer; exposing a first set of areas of said photosensitive layer with an optical stepper using a first reticle in second pattern of contact windows, and exposing a fifth set of areas of said photosensitive layer with a optical stepper using a second reticle in a second pattern of conductive lines, using dosage levels chosen so that said fourth set of areas are fully exposed and said fifth set of areas are partially exposed, and said fourth and fifth sets are aligned to each other; developing said photosensitive layer so that said fourth set of areas has no photosensitive layer, said fifth set of areas has a partial height of photosensitive layer and sixth set of areas has a full photosensitive layer; in a fifth etching step, selectively etching said second dielectric layer in said fourth set areas to form contact windows which at least partially penetrate said dielectric layer; in a sixth etching step, selectively etching away said fifth set of areas of said second photoresist layer; in a seventh etching step, etching said second dielectric layer in said fifth set of areas to a predetermined depth to form channels for said conductive lines, and in said fourth set of areas entirely through said dielectric layer to form contact windows which connect to said planarized conductive layer; depositing a second conductive layer over said second dielectric layer, filling said contact windows and channels; and, planarizing said second conductive layer to selectively remove excess amount of said second conductive layer from said second dielectric layer to form a second planarized conductive layer; wherein said sixth and seventh etching steps sequentially follow the previous etching step.
References Cited (Backward Citations)
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