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US5140190A Expired / Lapsed US ⏱️ 0.0 years remaining

Output circuit for a bipolar complementary metal oxide semiconductor

Assignee: Electronics and Telecommunications Research Institute
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Filing: 1991-05-06
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Granted: 1992-08-18
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Expires: 2011-05-06
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Abstract

Abstract An output circuit for a bipolar complementary metal oxide semiconductor. The circuit is formed by coupling P channel and N channel metal oxide semiconductor transistors to bipolar transistors to obtain both a low logic level state of 0 volts and a high logic level state of 5 volts.

Inventors

  • 👤 Hah Y. Yoo
  • 👤 Young M. Kim
  • 👤 Jin I. Hyun

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-27 06:17
CPC Classifications
H; H03; H03K; H03K3/00; H03K3/02; H03K3/353; H03K19/00; H03K19/0175; H03K19/017509; H03K19/017518; H03K19/02; H03K19/08; H03K19/094; H03K19/0944; H03K19/09448

Claims Analysis

Total Claims: 4
Claim 1
Independent Claim 347 words
An output circuit for a Bipolar complementary metal oxide semiconductor comprising: an input node connected to a gate electrode of a first P channel MOS transistor and to a respective gate electrode of first and second N channel MOS transistors; a first power supply node connected to a drain electrode of said first P channel MOS transistor and to a respective drain electrode of second and third P channel MOS transistors, and to a collector electrode of a first bipolar transistor; a second power supply node connected to a source electrode of said second N channel MOS transistor, to a source electrode of a third N channel MOS transistor, and to an emitter electrode of a second bipolar transistor, and to one terminal of a condenser; an output node connected to a source electrode of said third P channel transistor, and to a drain electrode of said first N channel MOS transistor, to a drain electrode of a fourth N channel MOS transistor, and to an emitter electrode of said first bipolar transistor, and to a collector electrode of said second bipolar transistor, and to an other terminal of said condenser; said first P channel MOS transistor having a source electrode connected to a drain electrode of said second N channel MOS transistor, and to a gate electrode of said second P channel MOS transistor, and to a gate electrode of a fifth N channel MOS transistor and to a gate electrode of said third N channel MOS transistor and to a base electrode of said first bipolar transistor; said second P channel MOS transistor having a source electrode connected to a draim electrode of said fifth N channel MOS transistor, a source electrode of which is connected to ground, and to a gate electrode of said third P channel MOS transistor and to a gate electrode of said fourth N channel MOS transistor; and said first N channel MOS transistor having a source electrode connected to a draim electrode of said third N channel MOS transistor, and to a base electrode of said second bipolar transistor.
Claim 2
Dependent Claim 347 words
An output circuit for a Bipolar complementary metal oxide semiconductor comprising: an input node connected to a gate electrode of a first P channel MOS transistor and to a respective gate electrode of first and second N channel MOS transistors; a first power supply node connected to a drain electrode of said first P channel MOS transistor and to a respective drain electrode of second and third P channel MOS transistors, and to a collector electrode of a first bipolar transistor; a second power supply node connected to a source electrode of said second N channel MOS transistor, to a source electrode of a third N channel MOS transistor, and to an emitter electrode of a second bipolar transistor, and to one terminal of a condenser; an output node connected to a source electrode of said third P channel transistor, and to a drain electrode of said first N channel MOS transistor, to a drain electrode of a fourth N channel MOS transistor, and to an emitter electrode of said first bipolar transistor, and to a collector electrode of said second bipolar transistor, and to an other terminal of said condenser; said first P channel MOS transistor having a source electrode connected to a drain electrode of said second N channel MOS transistor, and to a gate electrode of said second P channel MOS transistor, and to a gate electrode of a fifth N channel MOS transistor and to a gate electrode of said third N channel MOS transistor and to a base electrode of said first bipolar transistor; said second P channel MOS transistor having a source electrode connected to a draim electrode of said fifth N channel MOS transistor, a source electrode of which is connected to ground, and to a gate electrode of said third P channel MOS transistor and to a gate electrode of said fourth N channel MOS transistor; and said first N channel MOS transistor having a source electrode connected to a draim electrode of said third N channel MOS transistor, and to a base electrode of said second bipolar transistor.
Claim 3
Dependent Claim 269 words
An output circuit for a Bipolar complementary metal oxide semiconductor comprising: an input node connected to a gate electrode of a first P channel MOS transistor and to a respective gate electrode of a second P channel MOS transistor and of first, second and third N channel MOS transistors; a first power supply node connected to a drain electrode of said first P channel MOS transistor and of said second P channel MOS transistor, and to a collector electrode of a first bipolar transistor; a second power supply node connected to a source electrode of said second and said third N channel MOS transistors and to a source electrode of a fourth N channel MOS transistor, and to an emitter electrode of a second bipolar transistor, and to one terminal of a condenser; an output node connected to a source electrode of said second P channel MOS transistor, and to a drain electrode of said first and of said second N channel MOS transistors, and to an emitter electrode of said first bipolar transistor, and to a collector electrode of said second bipolar transistor, and to an other terminal of said condenser; said first P channel MOS transistor having a source electrode connected to a drain electrode of said third N channel MOS transistor, and to a base electrode of said first bipolar transistor, and to a gate electrode of said fourth N channel MOS transistor; and said first N channel MOS transistor having a source electrode connected to a drain electrode of said fourth N channel MOS transistor, and to a base electrode of said second bipolar transistor.
Claim 4
Dependent Claim 269 words
An output circuit for a Bipolar complementary metal oxide semiconductor comprising: an input node connected to a gate electrode of a first P channel MOS transistor and to a respective gate electrode of a second P channel MOS transistor and of first, second and third N channel MOS transistors; a first power supply node connected to a drain electrode of said first P channel MOS transistor and of said second P channel MOS transistor, and to a collector electrode of a first bipolar transistor; a second power supply node connected to a source electrode of said second and said third N channel MOS transistors and to a source electrode of a fourth N channel MOS transistor, and to an emitter electrode of a second bipolar transistor, and to one terminal of a condenser; an output node connected to a source electrode of said second P channel MOS transistor, and to a drain electrode of said first and of said second N channel MOS transistors, and to an emitter electrode of said first bipolar transistor, and to a collector electrode of said second bipolar transistor, and to an other terminal of said condenser; said first P channel MOS transistor having a source electrode connected to a drain electrode of said third N channel MOS transistor, and to a base electrode of said first bipolar transistor, and to a gate electrode of said fourth N channel MOS transistor; and said first N channel MOS transistor having a source electrode connected to a drain electrode of said fourth N channel MOS transistor, and to a base electrode of said second bipolar transistor.

References Cited (Backward Citations)

US5038057A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1995-08-18 1996-02-17 1996-08-18 $2000.00 Window Closed / Lapsed
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