US5131040A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Method for backing up and erasing encryption keys
Assignee: Motorola Solutions Inc
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Filing: 1991-02-28
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Granted: 1992-07-14
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Expires: 2011-02-28
Abstract
Abstract A method for backing up and erasing encryption keys that provides a backup power supply (110) so that keys stored in a memory (104) will not be lost inadvertently, while still permitting keys to be erased, either in response to a low battery condition in the absence of the main supply (101), or in response to an external key erase input (105).
Inventors
- 👤 Stanley Knapczyk
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-06 20:11
CPC Classifications
H; H04; H04L; H04L9/00; H04L9/08; H04L9/0894
Claims Analysis
Total Claims: 11
Claim 1
Independent Claim
80 words
For secure communication equipment having a first power source and a second power source, a method for ensuring that encryption keys stored in an associated memory are not compromised, the method comprising the steps of: (a) sensing that the first power source output has fallen below a first predetermined threshold; (b) sensing that the second power source output has fallen below a second predetermined threshold; and (c) initiating a programming sequence to place the associated memory into a predetermined state.
Claim 2
Dependent Claim
80 words
For secure communication equipment having a first power source and a second power source, a method for ensuring that encryption keys stored in an associated memory are not compromised, the method comprising the steps of: (a) sensing that the first power source output has fallen below a first predetermined threshold; (b) sensing that the second power source output has fallen below a second predetermined threshold; and (c) initiating a programming sequence to place the associated memory into a predetermined state.
Claim 3
Dependent Claim
17 words
The method in accordance with claim 1, wherein the first power source is derived from A.C. power.
Claim 4
Dependent Claim
15 words
The method in accordance with claim 1, wherein the second power source comprises a battery.
Claim 5
Dependent Claim
21 words
The method in accordance with claim 1, wherein the step (c) of initiating a programming sequence comprises powering up a microprocessor.
Claim 6
Dependent Claim
24 words
The method in accordance with claim 4, wherein the microprocessor executes a code sequence after power-up that writes predetermined values into the associated memory.
Claim 7
Dependent Claim
14 words
The method in accordance with claim 5, wherein the predetermined values are logic zeros.
Claim 8
Dependent Claim
31 words
The method in accordance with claim 4, wherein the step (c) of initiating a programming sequence further comprises removing power from the associated memory for a relatively short period of time.
Claim 9
Dependent Claim
30 words
The method in accordance with claim 7, wherein the step of removing power from the memory occurs at substantially the same time as the step of powering up the microprocessor.
Claim 10
Independent Claim
128 words
A method for backing up and erasing encryption keys, the method comprising: (a) monitoring output voltages of a first power source and a second power source; and, in the event that the first power source falls below a predetermined threshold, (a) entering a backup mode wherein only a memory device having encryption keys stored therein remains under power; then, in response to the second power source falling below a predetermined threshold, (a) initiating a power-up sequence that applies power to at least an associated microprocessor such that the microprocessor executes a code sequence that places the memory device into a predetermined state; and, at substantially the same time that the power-up sequence is initiated, (a) removing power from the memory device for a relatively short period of time.
Claim 11
Independent Claim
128 words
A method for backing up and erasing encryption keys, the method comprising: (a) monitoring output voltages of a first power source and a second power source; and, in the event that the first power source falls below a predetermined threshold, (a) entering a backup mode wherein only a memory device having encryption keys stored therein remains under power; then, in response to the second power source falling below a predetermined threshold, (a) initiating a power-up sequence that applies power to at least an associated microprocessor such that the microprocessor executes a code sequence that places the memory device into a predetermined state; and, at substantially the same time that the power-up sequence is initiated, (a) removing power from the memory device for a relatively short period of time.
References Cited (Backward Citations)
US4882752A
Cited
US4924513A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1995-07-14 | 1996-01-13 | 1996-07-14 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1999-07-14 | 2000-01-13 | 2000-07-14 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2003-07-14 | 2004-01-13 | 2004-07-14 | $7700.00 | Window Closed / Lapsed |