US5130635A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Voltage regulator having bias current control circuit
Assignee: NXP USA Inc
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Filing: 1991-08-19
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Granted: 1992-07-14
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Expires: 2011-08-19
Abstract
Abstract This invention relates to a bias current control circuit which drives a power MOS transistor. Since the power MOS transistor has a large capacitance which is formed between a gate and a channel, it is needed to provide a circuit which is able to sufficiently supply a drive current to the gate. Such a circuit increases a consumption current because the circuit has to always flow the current to drive the gate. This invention provides a circuit which cut the consumption current in the circuit when the transistor is not driven, and increases a consumption current in the circuit in order to keep a gate current when the transistor is driven.
Inventors
- 👤 Kiyoshi Kase
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-30 10:11
CPC Classifications
H; H03; H03K; H03K17/00; H03K17/04; H03K17/042; H03K17/04206; G; G05; G05F; G05F1/00; G05F1/10; G05F1/46; G05F1/56; G05F1/565; H03F; H03F1/00; H03F1/02; H03F1/0205; H03F1/0211; H03F1/0216; H03F1/0222; H03F3/00; H03F3/45; H03F3/45071; H03F3/45076
Claims Analysis
Total Claims: 3
Claim 1
Independent Claim
245 words
A bias current control circuit comprising: a MOS transistor having a gate, a source and a drain; a detection circuit in response to an output of said MOS transistor for providing a detection voltage; a reference voltage source for generating a predetermined reference voltage; an amplifier having a first input, a second input and a third input, said first input coupled to an output of said reference voltage source, said second input coupled to an output of said detection circuit and an output of said amplifier coupled to said gate of said MOS transistor, wherein said amplifier provides a voltage responsive to a difference voltage applied between said first input and said second input, and in response to a control signal given to said third input, said amplifier controls a current which flows into said gate; and a control signal generating circuit for supplying to said third input said control signal responsive to a difference between said reference voltage and a voltage provided at said output of said detection circuit; said control signal being a current, said control signal generating circuit further including an error voltage detection circuit for providing an error voltage proportional to a difference between said reference voltage and a voltage provided at said output of said detection circuit; an absolute value detection circuit for detecting an absolute value of said error voltage; and a signal generating circuit for providing a current proportional to output value of said absolute value detection circuit.
Claim 2
Dependent Claim
245 words
A bias current control circuit comprising: a MOS transistor having a gate, a source and a drain; a detection circuit in response to an output of said MOS transistor for providing a detection voltage; a reference voltage source for generating a predetermined reference voltage; an amplifier having a first input, a second input and a third input, said first input coupled to an output of said reference voltage source, said second input coupled to an output of said detection circuit and an output of said amplifier coupled to said gate of said MOS transistor, wherein said amplifier provides a voltage responsive to a difference voltage applied between said first input and said second input, and in response to a control signal given to said third input, said amplifier controls a current which flows into said gate; and a control signal generating circuit for supplying to said third input said control signal responsive to a difference between said reference voltage and a voltage provided at said output of said detection circuit; said control signal being a current, said control signal generating circuit further including an error voltage detection circuit for providing an error voltage proportional to a difference between said reference voltage and a voltage provided at said output of said detection circuit; an absolute value detection circuit for detecting an absolute value of said error voltage; and a signal generating circuit for providing a current proportional to output value of said absolute value detection circuit.
Claim 3
Dependent Claim
17 words
The bias current control circuit of claim 1, wherein said detection circuit comprises resistors connected in series.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1995-07-14 | 1996-01-13 | 1996-07-14 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1999-07-14 | 2000-01-13 | 2000-07-14 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2003-07-14 | 2004-01-13 | 2004-07-14 | $7700.00 | Window Closed / Lapsed |