US5123018A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Micropressor monitoring and resetting circuit
Assignee: Digital Appliance Controls Inc
•
Filing: 1989-12-05
•
Granted: 1992-06-16
•
Expires: 2009-12-05
Abstract
Abstract There is provided an efficient circuit which monitors micropressor operation and directs a reset signal to the microprocessor in the event of malfunction. The status monitor circuit operates by maintaining a capacitor charge with a status pulse from the microprocessor. The base of a transistor is controlled by this charged capacitor, such that the transistor switches OFF when the charge is drained and the absence of a status signal is indicated. When the transistor is switched OFF a reset pulse is enabled to the microprocessor. To provide the reset signal, a transformed AC line voltage is applied to the base of a second transistor to switch it ON and OFF in synchronization with the line frequency.
Inventors
- 👤 Gregory Peterson
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-08 00:29
CPC Classifications
G; G06; G06F; G06F11/00; G06F11/07; G06F11/14; G06F11/1402; G06F11/1415
Claims Analysis
Total Claims: 7
Claim 1
Independent Claim
158 words
A reset circuit for a microprocessor having a reset terminal and an output terminal comprising: pulse means coupled to an oscillating power line signal for generating a periodic pulse responsive to said power line signal, said pulse means being coupled to the reset terminal of the microprocessor to provide a periodic reset signal thereto: and pulse enabling means coupled to an output of the microprocessor to receive a status signal therefrom and to enable a reset signal from said pulse means in the absence of said status signal, wherein said pulse enabling means comprises a capacitor charging circuit connected to charge a capacitor in response to said status signal and coupled to the base of a transistor to maintain said transistor in its ON state as long as said capacitor remains charged, and wherein the collector of said transistor is coupled to said pulse means to inhibit said reset signal when said transistor is in its ON state.
Claim 2
Dependent Claim
158 words
A reset circuit for a microprocessor having a reset terminal and an output terminal comprising: pulse means coupled to an oscillating power line signal for generating a periodic pulse responsive to said power line signal, said pulse means being coupled to the reset terminal of the microprocessor to provide a periodic reset signal thereto: and pulse enabling means coupled to an output of the microprocessor to receive a status signal therefrom and to enable a reset signal from said pulse means in the absence of said status signal, wherein said pulse enabling means comprises a capacitor charging circuit connected to charge a capacitor in response to said status signal and coupled to the base of a transistor to maintain said transistor in its ON state as long as said capacitor remains charged, and wherein the collector of said transistor is coupled to said pulse means to inhibit said reset signal when said transistor is in its ON state.
Claim 3
Dependent Claim
25 words
The reset circuit for a microprocessor of claim 1 wherein said pulse means comprises means for converting an AC power line signal into periodic pulses.
Claim 4
Dependent Claim
47 words
The reset circuit for a microprocessor of claim 2 wherein said pulse means comprises a transistor having its base coupled to the AC power line to switch said transistor in synchronization with the AC power line signal and produce pulse signals at its collector in response thereto.
Claim 5
Dependent Claim
29 words
The reset circuit for a microprocessor of claim 3 wherein said capacitor charging circuit comprises a rectifying circuit arranged to rectify said status signal and charge said capacitor therewith.
Claim 6
Dependent Claim
29 words
The reset circuit for a microprocessor of claim 2 wherein said capacitor charging circuit comprises a rectifying circuit arranged to rectify said status signal and charge said capacitor therewith.
Claim 7
Dependent Claim
29 words
The reset circuit for a microprocessor of claim 1 wherein said capacitor charging circuit comprises a rectifying circuit arranged to rectify said status signal and charge said capacitor therewith.
References Cited (Backward Citations)
US4541050A
Cited
US4488303A
Cited
US4625309A
Cited
US4586179A
Cited
US4879647A
Cited
US4868817A
Cited
US4964123A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1995-06-16 | 1995-12-16 | 1996-06-16 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1999-06-16 | 1999-12-16 | 2000-06-16 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2003-06-16 | 2003-12-16 | 2004-06-16 | $7700.00 | Window Closed / Lapsed |