US5122912A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Signal processing apparatus selecting a scrambled signal having a desired dc component from among a plurality of scrambled signal obtained by scrambling an input-data signal with respective pseudo-random signals
Assignee: Sony Corp
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Filing: 1989-05-18
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Granted: 1992-06-16
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Expires: 2009-05-18
Abstract
Abstract An apparatus for processing an input data signal has a generator providing a plurality of pseudo-random signals each of which scrambles the input data signal for providing a plurality of respective scrambled outputs, a detector by which a DC component, such as, a run-length or a digital sum value, is detected for each of the scrambled outputs, and a selector responsive to the detector for selecting one of the scrambled outputs, for example, having a minimum run-length or a digital sum value closest to zero. An identifying signal identifying the pseudo-random signal used in scrambling the selected scrambled output is then transmitted with the latter, for example, by recording on a magnetic tape. When the transmitted signal is received or reproduced, the identifying signal included with it is detected, and the received signal is descrambled with a pseudo-random signal corresponding to the detected identifying signal.
Inventors
- 👤 Keiji Kanota
- 👤 Michio Nagai
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-28 03:49
CPC Classifications
G; G11; G11B; G11B20/00; G11B20/10; G11B20/10009; G11B20/14; G11B20/1403; G11B20/1423; G11B20/1426; H; H04; H04N; H04N5/00; H04N5/76; H04N5/91; H04N5/92; H04N5/926
Claims Analysis
Total Claims: 11
Claim 1
Independent Claim
139 words
An apparatus for processing an input data signal comprising: generator means for generating a plurality of pseudo-random signals; scramble means coupled to said generator means for scrambling the input data signal by each of said plurality of pseudo-random signals and thereby providing a plurality of respective outputs; detector means for detecting variation of a DC component for each of said outputs of said scramble means; selector means controlled by said detector means for selecting one of said outputs of said scramble means exhibiting a desired DC component; means for adding to said one output selected by said selector means an identifying signal which identifies the pseudo-random signal used in scrambling said one selected output of the scramble means; and means for transmitting a signal comprised of said one output selected by said selector means together with said identifying signal.
Claim 2
Independent Claim
139 words
An apparatus for processing an input data signal comprising: generator means for generating a plurality of pseudo-random signals; scramble means coupled to said generator means for scrambling the input data signal by each of said plurality of pseudo-random signals and thereby providing a plurality of respective outputs; detector means for detecting variation of a DC component for each of said outputs of said scramble means; selector means controlled by said detector means for selecting one of said outputs of said scramble means exhibiting a desired DC component; means for adding to said one output selected by said selector means an identifying signal which identifies the pseudo-random signal used in scrambling said one selected output of the scramble means; and means for transmitting a signal comprised of said one output selected by said selector means together with said identifying signal.
Claim 3
Dependent Claim
31 words
An apparatus according to claim 1; wherein said means for transmitting includes means for recording said one output selected by said selector means with said identifying signal on a magnetic tape.
Claim 4
Dependent Claim
42 words
An apparatus according to claim 2; wherein said detector means detects maximum run-lengths of said outputs of said scramble means, and said selector means selects the one of said outputs of the scramble means having the shortest of said maximum run lengths.
Claim 5
Dependent Claim
45 words
An apparatus according to claim 2; wherein said detector means detects maximum digital sum values of said outputs of the scramble means, and said selector means selects the one of said outputs of the scramble means having the smallest of said maximum digital sum values.
Claim 6
Dependent Claim
26 words
An apparatus according to claim 1; further comprising precoder means for encoding each of said outputs of said scramble means to have a predetermined frequency characteristic.
Claim 7
Dependent Claim
16 words
An apparatus according to claim 5; wherein said precoder means is a partial response encoder means.
Claim 8
Independent Claim
198 words
An apparatus for processing an input data single comprising: generator means for generating a plurality of pseudo-random signals; scramble means coupled to said generator means for scrambling the input data signal by each of said plurality of pseudo-random signals and thereby providing a plurality of respective outputs; first detector means for detecting variation of a DC component for each of said outputs of said scramble means; selector means controlled by said first detector means for selecting one of said outputs of said scramble means exhibiting a desired DC component; means for adding to said one output selected by said selector means an identifying signal which identifies the pseudo-random signal used in scrambling said one selected output of the scramble means; means for transmitting a signal comprised of said one output selected by said selector means together with said identifying signal; receiver means for receiving a signal transmitted by said means for transmitting; second detector means for detecting said identifying signal in the received, transmitted signal; local pseudo-random signal generating means for generating local pseudo-random signals; and de-scramble means for de-scrambling the received signal in accordance with one of said local pseudo-random signals corresponding to the detected identifying signal.
Claim 9
Independent Claim
198 words
An apparatus for processing an input data single comprising: generator means for generating a plurality of pseudo-random signals; scramble means coupled to said generator means for scrambling the input data signal by each of said plurality of pseudo-random signals and thereby providing a plurality of respective outputs; first detector means for detecting variation of a DC component for each of said outputs of said scramble means; selector means controlled by said first detector means for selecting one of said outputs of said scramble means exhibiting a desired DC component; means for adding to said one output selected by said selector means an identifying signal which identifies the pseudo-random signal used in scrambling said one selected output of the scramble means; means for transmitting a signal comprised of said one output selected by said selector means together with said identifying signal; receiver means for receiving a signal transmitted by said means for transmitting; second detector means for detecting said identifying signal in the received, transmitted signal; local pseudo-random signal generating means for generating local pseudo-random signals; and de-scramble means for de-scrambling the received signal in accordance with one of said local pseudo-random signals corresponding to the detected identifying signal.
Claim 10
Independent Claim
208 words
An apparatus for processing an input data signal comprising: generator means for generating a plurality of pseudo-random signals; scramble means for scrambling the input data signal by each of said plurality of pseudo-random signals and thereby providing a plurality of respective outputs; precoder means for encoding each of said outputs of said scramble means to have a predetermined frequency characteristic, including a plurality of partial response encoders each comprising feedback circuit means having a delay for encoding a respective output of said scramble means in accordance with a partial response method, and switching means for providing, as a feedback to one of said partial response encoders, an output signal of another of said partial response encoders; detector means for detecting variation of a DC component for each of said outputs of said scramble means; selector means controlled by said detector means for selecting one of said outputs of said scramble means exhibiting a desired DC component; means for adding to said one output selected by said selector means an identifying signal which identifies the pseudo-random signal used in scrambling said one selected output of the scramble means; and means for transmitting a signal comprised of said one output selected by said selector means together with said identifying signal.
Claim 11
Independent Claim
208 words
An apparatus for processing an input data signal comprising: generator means for generating a plurality of pseudo-random signals; scramble means for scrambling the input data signal by each of said plurality of pseudo-random signals and thereby providing a plurality of respective outputs; precoder means for encoding each of said outputs of said scramble means to have a predetermined frequency characteristic, including a plurality of partial response encoders each comprising feedback circuit means having a delay for encoding a respective output of said scramble means in accordance with a partial response method, and switching means for providing, as a feedback to one of said partial response encoders, an output signal of another of said partial response encoders; detector means for detecting variation of a DC component for each of said outputs of said scramble means; selector means controlled by said detector means for selecting one of said outputs of said scramble means exhibiting a desired DC component; means for adding to said one output selected by said selector means an identifying signal which identifies the pseudo-random signal used in scrambling said one selected output of the scramble means; and means for transmitting a signal comprised of said one output selected by said selector means together with said identifying signal.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1995-06-16 | 1995-12-16 | 1996-06-16 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1999-06-16 | 1999-12-16 | 2000-06-16 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2003-06-16 | 2003-12-16 | 2004-06-16 | $7700.00 | Window Closed / Lapsed |