Step-down unit incorporated in large scale integrated circuit

Claim 2

A step-down circuit incorporated in an integrated circuit for producing an internal power voltage from an external power voltage, said integrated circuit selectively entering an active mode and a standby mode of operation, comprising: a) a reference signal generating unit producing a reference signal indicative of a target level for said internal power voltage; b) first and second voltage regulating units for regulating said internal power voltage to said target level, said first and second voltage regulating units being enabled when said integrated circuit enters said active mode of operation, said second voltage regulating unit being disenabled in said standby mode of operation; and c) a monitoring unit monitoring the voltage level of said power voltage and producing an enable signal when said external power voltage exceeds a predetermined voltage level in said standby mode of operation, in which said first voltage regulating unit is enabled in the presence of said enable signal in said standby mode of operation.

Claim 3

A step-down circuit as set forth in claim 1, in which said first voltage regulating unit comprises a series combination of a first transistor of a first channel conductivity type, a first common drain node and a second transistor of a second channel conductivity type coupled between a source of said external power voltage and a common node, a series combination of a third transistor of said first channel conductivity type, a second common drain node and a fourth transistor of said second channel conductivity type coupled between said source of said external power voltage and said common node, a fifth transistor of said second channel conductivity type coupled between said common node and a ground node, a sixth transistor of said first channel conductivity type coupled between said source of said external power voltage and the gate electrodes of said first and third transistors, a seventh transistor of said second channel conductivity type coupled between said first common drain node and said ground node, and an eighth transistor of said first channel conductivity type coupled between said source of said external power voltage and a source of internal power voltage, said second common drain node being coupled to the gate electrodes of said first and third transistors, said reference signal and said internal power voltage being supplied to the gate electrodes of said second and fourth transistors, respectively, said enable signal being supplied to the gate electrodes of said fifth and sixth transistors, a complementary signal of said enable signal being supplied to the gate electrode of said seventh transistor, said first common drain node being coupled to the gate electrode of said eighth transistor.

Claim 4

A step-down circuit as set forth in claim 2, in which said monitoring unit comprises a voltage divider coupled between said source of said external power voltage and said ground node for producing a control voltage, a voltage detector coupled between said source of said external power voltage and said ground node and responsive to said control voltage for producing a monitoring signal, a logic gate enabled with an external control signal indicative of said active mode and responsive to said monitoring signal for producing said complementary signal, and an inverting circuit coupled to the output node of said logic gate and producing said enable signal.

Claim 5

A step-down circuit as set forth in claim 3, in which said voltage divider is implemented by a series combination of first and second resisters.

Claim 6

A step-down circuit as set forth in claim 3, in which said voltage detector comprises a series combination of a ninth transistor of said first channel conductivity type and a third resister, and in which said control voltage is supplied to said ninth transistor.

Claim 7

A step-down circuit as set forth in claim 3, in which said logic gate carries out a NOR operation.

Claim 8

A step-down circuit as set forth in claim 6, in which said external control signal is a chip select signal.

Claim 9

A step-down circuit as set forth in claim 3, in which said voltage divider comprises a series combination of a tenth transistor of said first channel conductivity type and an eleventh transistor of said second channel conductivity type, the gate electrodes of said tenth and eleventh transistors being coupled to said ground node and said source of said external power voltage, respectively.