US5117424A
Expired / Lapsed
US
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Method and apparatus for setting clock signals to predetermined phases at remote broadcast sites in simulcast systems
Assignee: Siemens Dematic Postal Automation LP
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Filing: 1990-10-26
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Granted: 1992-05-26
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Expires: 2010-10-26
Abstract
Abstract A coherency generator for providing signals to control the time and phase coherency of data information signals in an overlap region of a simulcast system that comprises a control site and a plurality of remote broadcast sites. A channel card located at each remote site derives from the information signals a master clock signal for synchronizing the broadcast of data information on an RF carrier. At substantially regular intervals a transmit section of the coherency generator transmits a synchronization command signal after detecting a predetermined sequence of ones or zeros. A receive section of the coherency generator issues a reset pulse to the remote site channel card upon detecting a predetermined pattern of values of a preselected data bit, and following detection of the synchronization command pulse. The reset pulse clears the memory elements of the channel card, setting the phase of the clock signal.
Inventors
- 👤 Richard Cohen
- 👤 Rickie W. Wallace
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-25 11:10
CPC Classifications
H; H04; H04H; H04H20/00; H04H20/65; H04H20/67; H04B; H04B7/00; H04B7/24; H04B7/26; H04B7/2625
Claims Analysis
Total Claims: 12
Claim 1
Independent Claim
187 words
A coherency generator for setting the phase of a clock signal having a predetermined frequency to a known phase in order to achieve bit coherency in an overlap region of a simulcast system, the simulcast system having a plurality of remote broadcast sites each of which transmit the same data signals on the same channels, the clock signal controlling the timing of the transmission of data from a line receiver to a broadcast transmitter at each remote broadcast site, the coherency generator comprising: means for detecting a predetermined value of a first preselected data bit in a synchronous data transmission signal; means for detecting a predetermined pattern of data values from preselected data bits in the synchronous data transmission signal to place all line receivers in a simulcast system receiving the synchronous data transmission signal in a known logic state; and means for setting a clock signal derived at the remote site from the synchronous data transmission signal to a predetermined phase upon detecting the predetermined pattern of data values of the preselected data bits following detection of the predetermined value of the first preselected data bit.
Claim 2
Dependent Claim
187 words
A coherency generator for setting the phase of a clock signal having a predetermined frequency to a known phase in order to achieve bit coherency in an overlap region of a simulcast system, the simulcast system having a plurality of remote broadcast sites each of which transmit the same data signals on the same channels, the clock signal controlling the timing of the transmission of data from a line receiver to a broadcast transmitter at each remote broadcast site, the coherency generator comprising: means for detecting a predetermined value of a first preselected data bit in a synchronous data transmission signal; means for detecting a predetermined pattern of data values from preselected data bits in the synchronous data transmission signal to place all line receivers in a simulcast system receiving the synchronous data transmission signal in a known logic state; and means for setting a clock signal derived at the remote site from the synchronous data transmission signal to a predetermined phase upon detecting the predetermined pattern of data values of the preselected data bits following detection of the predetermined value of the first preselected data bit.
Claim 3
Dependent Claim
50 words
The coherency generator as set forth in claim 1 wherein the means for detecting a predetermined value of a first preselected data bit and the means for detecting a predetermined pattern of data values from the second preselected data bits in the synchronous data transmission signal includes a logic circuit.
Claim 4
Dependent Claim
85 words
The coherency generator as set forth in claim 2: wherein each line receiver at a remote broadcast site includes a channel card for providing the first preselected data bit and the second preselected data bit to the logic circuit; and wherein the means for setting a clock signal to a predetermined phase includes a reset line from the logic circuit to the channel card, the logic circuit generating a reset command on the reset line that clears and resets memory elements on the channel card.
Claim 5
Dependent Claim
42 words
The coherency generator according to claim 1 further comprising a means for generating a synchronous command signal for causing the means for generating the synchronous data transmission signal to set the value of the first preselected data bit to the predetermined value.
Claim 6
Dependent Claim
17 words
The coherency generator according to claim 4 wherein the synchronization command is received at substantially regular intervals.
Claim 7
Independent Claim
174 words
A method for setting phases of clock signals having a predetermined frequency to a known phase in order to achieve bit coherency in an overlap region of a simulcast system, the simulcast system having a plurality of remote broadcast sites each of which transmit the same data signals on the same channels, controlling the timing of the transmission of data from a line receiver to a broadcast transmitter at each remote broadcast site, the method comprising: detecting a predetermined value of a first preselected data bit in a synchronous data transmission signal; detecting a predetermined pattern of data values of preselected data bits in the synchronous data transmission signal to place all line receivers in a simulcast system receiving the synchronous data transmission signal in a known logic state; and setting a clock signal derived from the synchronous data transmission signal at the remote site to a predetermined phase upon detecting the predetermined pattern of data values of the preselected data bits following detection of the predetermined value of the first preselected data bit.
Claim 8
Independent Claim
174 words
A method for setting phases of clock signals having a predetermined frequency to a known phase in order to achieve bit coherency in an overlap region of a simulcast system, the simulcast system having a plurality of remote broadcast sites each of which transmit the same data signals on the same channels, controlling the timing of the transmission of data from a line receiver to a broadcast transmitter at each remote broadcast site, the method comprising: detecting a predetermined value of a first preselected data bit in a synchronous data transmission signal; detecting a predetermined pattern of data values of preselected data bits in the synchronous data transmission signal to place all line receivers in a simulcast system receiving the synchronous data transmission signal in a known logic state; and setting a clock signal derived from the synchronous data transmission signal at the remote site to a predetermined phase upon detecting the predetermined pattern of data values of the preselected data bits following detection of the predetermined value of the first preselected data bit.
Claim 9
Dependent Claim
48 words
The method for setting phases of clock signals as set forth in claim 6 further comprising the steps of: setting a predetermined data bit in the synchronous data transmission signal to a predetermined value; and transmitting the synchronous data transmission signal to a plurality of remote broadcast sites.
Claim 10
Dependent Claim
32 words
The method for setting phases of clock signals as set forth in claim 7 further comprising the step of deriving from the synchronous data transmission the clock signal at each remote site.
Claim 11
Dependent Claim
54 words
The method for setting phases of clock signals as set forth in claim 6 wherein the step of setting a clock signal to a predetermined phase is comprised of a step of resetting memory elements in a channel card within a line receiver receiving the synchronous data transmission signal at the remote broadcast site.
Claim 12
Dependent Claim
54 words
The method for setting phases of clock as set forth in claim 9 wherein the channel card derives the clock signal from the synchronous data transmission signal, the clock signal timing the transfer of data transmitted on the synchronous data transmission signal from the channel card to a broadcast transmitter at the remote site.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1995-05-26 | 1995-11-25 | 1996-05-26 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1999-05-26 | 1999-11-25 | 2000-05-26 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2003-05-26 | 2003-11-25 | 2004-05-26 | $7700.00 | Window Closed / Lapsed |