Random number generator driven by independent clock pulses asynchronously with system clock pulses

Claim 1

An integrated circuit including a system clock for producing clock pulses for driving said integrated circuit and a random number generator built into said integrated circuit for generating random numbers in response to a read signal, said random number generator comprising: at least two oscillators for generating respective independent clock pulse signals each having clock pulses which are asynchronous with respect to the clock pulses of the system clock of said integrated circuit and with respect to the clock pulses the other of said at least two oscillators; at least two counters each connected to a respective one of said at least two oscillators for respectively counting the clock pulses of said at least two oscillators; and read-out means connected for reading out the contents of said at least two counters in parallel in response to the read signal, the contents read out of said at least two counters constituting a random number.