Compensation for a feedback amplifier with current output stage

Claim 2

A feedback amplifier for receiving an input signal at an input terminal and providing an output current proportional to said input signal, said amplifier comprising: a) an input stage coupled to said input terminal and providing an intermediate signal; b) an output stage coupled to said intermediate signal and providing said output current; c) a compensation admittance circuit having one terminal coupled to a first node in said input stage which signal at said node varies in response to said input signal, where the loading at said first node caused by said compensation admittance circuit reduces the bandwidth of said amplifier; and d) an admittance driver circuit having an output coupled to a second terminal of said compensation admittance circuit and having an input coupled to a second node in said amplifier such that said second terminal voltage varies linearly with said output current.

Claim 3

The amplifier as set forth in claim 1 wherein said compensation admittance circuit is a capacitor and said admittance driving circuit is a capacitor driver circuit.

Claim 4

The amplifier as set forth in claim 1 wherein said admittance driver circuit has a second input coupled to said input terminal.

Claim 5

The amplifier as set forth in claim 1 wherein said input signal is a voltage input signal.

Claim 6

The amplifier as set forth in claim 1 wherein the signal at said second node is derived from said output current.

Claim 7

The amplifier as set forth in claim 1 wherein said second node is in a third stage of said amplifier, said third stage being coupled to said intermediate signals, said signal at said second node being proportional to said output current signal.

Claim 8

The amplifier as set forth in claim 1 wherein said input of said admittance driver circuit is a voltage derived from the voltage differential across a resistive element placed in a series path with said output current.

Claim 9

The amplifier set forth in claim 1 wherein said bandwidth is dependent on the gm of at least one active device in said amplifier.

Claim 10

The amplifier set forth in claim 8 wherein the said at least one active device is an MOS transistor.

Claim 11

The amplifier set forth in claim 8 wherein the said at least one active device is a bipolar transistor.

Claim 12

The amplifier set forth in claim 1 wherein said output stage comprises a common source amplifier.

Claim 13

The amplifier set forth in claim 1 wherein said output stage comprises a common emitter amplifier.

Claim 14

An MOS current driver circuit comprising: a) a first differential amplifier having a first input for receiving an input signal; b) a feedback transistor having its gate coupled to an output of said differential amplifier, its source coupled to a first reference potential, and its drain current coupled to a second input of said first differential amplifier and to one end of a first resistive element, the other end of which is coupled to a second reference potential, said first differential amplifier, said feedback transistor and said resistive element being operable to cause the signal level at said second input of said first differential amplifier to change in the same direction as a change at said first input of said first differential amplifier; c) an output transistor for providing an output current at the drain of said output transistor, the gate of said output transistor coupled to the gate of said first feedback transistor; and d) a compensation transistor having its gate coupled to said output of said differential amplifier, its source coupled to said first reference potential, and its drain coupled to one end of a second resistive element, the other end of which is coupled to said second reference potential, its drain also coupled to one end of a compensation admittance circuit, the other end of said compensation admittance circuit coupled to said output of said differential amplifier.

Claim 15

An MOS current driver circuit comprising: a) a first differential amplifier having a first input for receiving an input signal; b) a feedback transistor having its gate coupled to an output of said differential amplifier, its source coupled to a first reference potential, and its drain current coupled to a second input of said first differential amplifier and to one end of a first resistive element, the other end of which is coupled to a second reference potential, said first differential amplifier, said feedback transistor and said resistive element being operable to cause the signal level at said second input of said first differential amplifier to change in the same direction as a change at said first input of said first differential amplifier; c) an output transistor for providing an output current at the drain of said output transistor, the gate of said output transistor coupled to the gate of said first feedback transistor; and d) a compensation transistor having its gate coupled to said output of said differential amplifier, its source coupled to said first reference potential, and its drain coupled to one end of a second resistive element, the other end of which is coupled to said second reference potential, its drain also coupled to one end of a compensation admittance circuit, the other end of said compensation admittance circuit coupled to said output of said differential amplifier.

Claim 16

An MOS driver circuit as set forth in claim 13 further including a buffer circuit interposed between a first node and a second node, said first node formed by the connection of said compensation admittance circuit and the output of said differential amplifier, and said second node formed by the common connection of the gates of said feedback transistor and said compensation transistor, the input of said buffer circuit coupled to said first node, and the output of said buffer circuit coupled to said second node.

Claim 19

The method for compensating a feedback amplifier set forth in claim 15 further including the steps of a) generating an input derived signal which is derived from the signal at said input terminal; b) combining said compensation signal with said input derived signal; and c) applying said combination of said compensation signal and said input derived signal to said second terminal of said admittance circuit.

Claim 20

The method for compensating a feedback amplifier set forth in claim 15 wherein the step of generating a compensation signal which varies linearly with said output current is accomplished by deriving said compensation signal from a second node in said amplifier, the signal at said second node being proportional to said output current.

Claim 21

The method for compensating a feedback amplifier set forth in claim 15 wherein the step of generating a compensation signal which varies linearly with said output current is accomplished by deriving said compensation signal from said output current.

Claim 22

The method for compensating a feedback amplifier set forth in claim 18 wherein the step of generating a compensation signal which varies linearly with said output current is accomplished by generating a voltage derived from the voltage differential across a resistive element placed in a series path with said output current.