US5115187A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Wide dynamic range current source circuit
Assignee: Sumitomo Electric Industries Ltd
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Filing: 1990-09-28
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Granted: 1992-05-19
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Expires: 2010-09-28
Abstract
Abstract A wide dynamic range current source circuit comprising a first current mirror circuit including a first transistor functioning as a first output current path, and a second transistor for receiving a first control voltage and functioning as an input current path for controlling a current flowing in the output current path. The wide dynamic range current source circuit further comprises a second current mirror circuit including a third transistor functioning as a second output current path bypassing the input current path of the first current mirror circuit, and a fourth transistor for receiving a second control voltage different from the first control voltage and controlling a current of the second output current path. The second current mirror circuit controls current flow in the first mirror circuit such that this current flow is larger than a current flowing during a non-linear operation of the first current mirror circuit.
Inventors
- 👤 Shigeo Hayashi
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-06 12:53
CPC Classifications
G; G05; G05F; G05F3/00; G05F3/02; G05F3/08; G05F3/10; G05F3/16; G05F3/20; G05F3/26; G05F3/265; G05F3/22
Claims Analysis
Total Claims: 6
Claim 1
Independent Claim
146 words
A wide dynamic range current source circuit, comprising: a first current mirror circuit comprising: a first transistor providing a first output current path, and a second transistor for receiving a first control voltage, said second transistor providing an input current path for controlling a current flow in said output current path; and a second current mirror circuit comprising: a third transistor providing a second output current path, said third transistor bypassing said input current path of said first current mirror circuit, and a fourth transistor for receiving a second control voltage different from said first control voltage and controlling a current of said second output current path, said second current mirror circuit controlling a current flow in said first current mirror circuit, said current flow in said first current mirror circuit being larger than a current flowing during non-linear operation of said first current mirror circuit.
Claim 2
Dependent Claim
146 words
A wide dynamic range current source circuit, comprising: a first current mirror circuit comprising: a first transistor providing a first output current path, and a second transistor for receiving a first control voltage, said second transistor providing an input current path for controlling a current flow in said output current path; and a second current mirror circuit comprising: a third transistor providing a second output current path, said third transistor bypassing said input current path of said first current mirror circuit, and a fourth transistor for receiving a second control voltage different from said first control voltage and controlling a current of said second output current path, said second current mirror circuit controlling a current flow in said first current mirror circuit, said current flow in said first current mirror circuit being larger than a current flowing during non-linear operation of said first current mirror circuit.
Claim 3
Dependent Claim
202 words
A current source circuit according to claim 1, wherein said first transistor is a first bipolar transistor, a collector of said first transistor being coupled to an output terminal and an emitter of said first transistor being coupled to a low voltage, said second transistor is a second bipolar transistor, a collector of said second transistor being coupled to a first control voltage input terminal through a first resistor, an emitter of said second transistor being coupled to said low voltage, a base of said second transistor being coupled to said collector of said second transistor and said base of said first transistor, said third transistor is a third bipolar transistor, a collector of said third transistor being coupled to said collector of said second transistor, an emitter of said third transistor being coupled to said low voltage, and said fourth transistor is a fourth bipolar transistor, a collector of said fourth transistor being coupled to a second control voltage input terminal through a second resistor, an emitter of said fourth transistor being coupled to said low voltage, and a base of said fourth transistor being coupled to said collector of said fourth transistor and to a base of said third transistor.
Claim 4
Dependent Claim
18 words
A current source circuit according to claim 1, wherein said first and second transistor each is an FET.
Claim 5
Dependent Claim
18 words
A current source circuit according to claim 1, wherein said third and fourth transistor each is an FET.
Claim 6
Dependent Claim
20 words
A current source circuit according to claim 1, wherein said first, second, third and fourth transistor each is an FET.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1995-05-19 | 1995-11-18 | 1996-05-19 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1999-05-19 | 1999-11-18 | 2000-05-19 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2003-05-19 | 2003-11-18 | 2004-05-19 | $7700.00 | Window Closed / Lapsed |