Integrating the logical and physical design of electronically linked objects

Claim 1

The computer implemented method of automatically integrating a logical design process and a physical design process for models forming an electronic circuit to minimize an overall design time, the computer implemented method comprising the following steps: a) analyzing timing of an initial logic design of said electronic circuit to estimate a timing debt available to interconnect the models within performance limitations; b) coarsely placing the models of said logic design based upon the estimate of the timing debt and partitioning the models to form a cut-set having connections such that a weighted sum of the connections in the cut-set is minimized; c) determining whether an additional time delay incurred by including the connections in the cut-set causes the timing debt not to meet predetermined performance limitations; and d) dynamically weighing connections that exceed the performance limitations such that connections that do not exceed the predetermined performance limitations are non-weighted and preferred in said cut-set.