Reduced size accurate solid-state camera having low power consumption

Claim 1

Camera having integrated scanning circuits comprising a plurality of detectors arranged in the form of rows and columns, said detectors supplying an electrical signal proportional to their illumination, N being the number of detectors forming a row; an optical system able to move an image translation passed; said columns of detectors and perpendicular thereto, said optical system being able to move the image in one or two successive, opposite movement directions; a plurality of reading circuits, each having a charge couple device integrated beneath the detectors and each charge couple device being connected to one detector, respectively, each reading circuit being able to read the electrical signal supplied by its respective detector, in relation with the movement of the image and supplying a reading signal; a row scanning circuit coupled to said reading circuits and including a row multiplexer having a CCD-type structure and having the same number of first stages as there are rows of detectors, each first stage being connected to a column scanning circuit, said row multiplexer supplying a signal representing a column of the image formed by the different signals supplied by column scanning circuits; for each row, one column scanning circuit having a CCD-type structure, said column scanning circuits being able to add the reading signals corresponding to the detection of the same element of the image moving successively passed the detectors of the same row and supplying signals representative of the elements of the image (30) having passed over all the detectors (12) of a row; the column scanning circuits being able to add the reading signals corresponding to the detection of the same element of the image moving successively passed the detectors (12) of a same row and supplying signals representing the elements of the image having passed all the detectors of a same row in one and/or the other direction, one part of each scanning circuit being integrated beneath the detectors of the corresponding row and the other part being integrated next to the said row with a spacing equal to or smaller than the spacing of the detector rows; each column scanning circuit comprising: a column multiplexer have N second stages integrated beneath the detectors of the corresponding row, each second stage being connected to a reading circuit, said column multiplexer being able to record in its different second stages the reading signals formed after a photograph and to supply, on a multiplexing output, integrated next to the detectors of the corresponding row in order to process the signals supplied by said column multiplexer and performing a delay and summation function, said processor supplying, on at least one output, signals representing elements forming a row of the image, each of these signals being constituted by the sum of the signals corresponding to the same element of the image having moved passed all the detectors of a row; for each processor, a control circuit connected to an output of said column multiplexer and to an input of said processor, said control circuit being able to allow or prevent a transfer of signals between the said column multiplexer and said processor (60).