Differential voltage comparator

Claim 2

A voltage comparator circuit, comprising: a biasing network for regulating a bias current; a loading network for regulating a load current; a first differential input for receiving a first input voltage potential; a first controllable electron valve constructed and arranged to have a first electron valve body that is electrically coupled to a first body effect voltage potential, the first controllable electron valve further comprising: a first electron valve source that is electrically coupled to the biasing network; a first electron valve drain that is electrically coupled to the loading network; and a first electron valve control gate that is electrically coupled to the first differential input; a second differential input for receiving a second input voltage potential; a second controllable electron valve constructed and arranged to have a second electron valve body that is electrically coupled to a second body effect voltage potential that is different than the first body effect voltage potential, the second controllable electron valve further comprising: a second electron valve source that is electrically coupled to the biasing network; a second electron valve drain that is electrically coupled to the loading network; and a second electron valve control gate that is electrically coupled to the second differential input; and a voltage compare output, electrically coupled to the first electron valve drain, for presenting an electrical signal representative of the compared differential input voltage potentials.

Claim 3

The circuit of claim 1, wherein the first electron valve body is electrically coupled to the first electron valve source.

Claim 4

The circuit of claim 1, wherein the second electron valve body is electrically coupled to the second electron valve source.

Claim 5

The circuit of claim 1, wherein the controllable electron valves comprise at least one N-channel MOS transistor.

Claim 6

The circuit of claim 1, wherein the controllable electron valves comprise at least one P-channel MOS transistor.

Claim 7

The circuit of claim 1, wherein the loading network comprises at least two controllable electron valves in a current mirror configuration, thereby providing an active load for the first and second electron valves that are in a differential pair configuration.

Claim 8

The circuit of claim 1, wherein the biasing network comprises at least one biasing controllable electron valve having its electron valve drain electrically coupled to the first and the second electron valve sources that are in a differential pair configuration, thereby providing a biasing current for the differential pair, the biasing electron valve further comprising: an electron valve source that is electrically coupled to a reference voltage potential; an electron valve control gate that is electrically coupled to a biasing voltage potential; and an electron valve body that is electrically coupled to a third body effect voltage potential.

Claim 9

The circuit of claim 7, wherein the biasing electron valve body is electrically coupled to the biasing electron valve source.

Claim 10

A voltage comparator circuit, comprising: a biasing network for regulating a bias current; a loading network for regulating a load current; a first differential input for receiving a first input voltage potential; a first controllable electron valve constructed and arranged to have a first electron valve body that is electrically coupled to a first body effect voltage potential, the first controllable electron valve further comprising: a first electron valve source that is electrically coupled to the biasing network; a first electron valve drain that is electrically coupled to the loading network; and a first electron valve control gate that is electrically coupled to the first differential input; a second differential input for receiving a second input voltage potential; a second controllable electron valve constructed and arranged to have a second electron valve body that is electrically coupled to a second body effect voltage potential that is different than the first body effect voltage potential, the second controllable electron valve further comprising: a second electron valve source that is electrically coupled to the biasing network; a second electron valve drain that is electrically coupled to the loading network; and a second electron valve control gate that is electrically coupled to the second differential input; and a voltage compare output, electrically coupled to the second electron valve drain, for presenting an electrical signal representative of the compared differential input voltage potentials.

Claim 11

A voltage comparator circuit, comprising: a biasing network for regulating a bias current; a loading network for regulating a load current; a first differential input for receiving a first input voltage potential; a first controllable electron valve constructed and arranged to have a first electron valve body that is electrically coupled to a first body effect voltage potential, the first controllable electron valve further comprising: a first electron valve source that is electrically coupled to the biasing network; a first electron valve drain that is electrically coupled to the loading network; and a first electron valve control gate that is electrically coupled to the first differential input; a second differential input for receiving a second input voltage potential; a second controllable electron valve constructed and arranged to have a second electron valve body that is electrically coupled to a second body effect voltage potential that is different than the first body effect voltage potential, the second controllable electron valve further comprising: a second electron valve source that is electrically coupled to the biasing network; a second electron valve drain that is electrically coupled to the loading network; and a second electron valve control gate that is electrically coupled to the second differential input; and a voltage compare output, electrically coupled to the second electron valve drain, for presenting an electrical signal representative of the compared differential input voltage potentials.

Claim 12

The circuit of claim 9, wherein the first electron valve body is electrically coupled to the first electron valve source.

Claim 13

The circuit of claim 9, wherein the second electron valve body is electrically coupled to the second electron valve source.

Claim 14

The circuit of claim 9, wherein the controllable electron valves comprise at least one N-channel MOS transistor.

Claim 15

The circuit of claim 9, wherein the controllable electron valves comprise at least one P-channel MOS transistor.

Claim 16

The circuit of claim 9, wherein the loading network comprises at least two controllable electron valves in a current mirror configuration, thereby providing an active load for the first and second electron valves that are in a differential pair configuration.

Claim 17

The circuit of claim 9, wherein the biasing network comprises at least one biasing controllable electron valve having its electron valve drain electrically coupled to the first and the second electron valve sources that are in a differential pair configuration, thereby providing a biasing current for the differential pair, the biasing electron valve further comprising: an electron valve source that is electrically coupled to a reference voltage potential; an electron valve control gate that is electrically coupled to a biasing voltage potential; and an electron valve body that is electrically coupled to a third body effect voltage potential.

Claim 18

The circuit of claim 15, wherein the biasing electron valve body is electrically coupled to the biasing electron valve source.

Claim 21

A voltage comparator circuit, comprising: a biasing network for providing a bias current; a loading network for regulating a load current; a differentially coupled transistor pair, each transistor of the differentially coupled transistor pair having a drain coupled to the loading network, a source coupled to the biasing network, a body coupled to a body effect voltage potential, and a gate, the differentially coupled transistor pair being arranged such that a first and second input signals are respectively received by the gates of the transistors, and each transistor body of the differentially coupled transistor pair being coupled to a different body effect voltage potential; and an output port coupled to one of the drains of the transistor pair.

Claim 22

A voltage comparator circuit, comprising: a biasing network for providing a bias current; a loading network for regulating a load current; a differentially coupled transistor pair, each transistor of the differentially coupled transistor pair having a drain coupled to the loading network, a source coupled to the biasing network, a body coupled to a body effect voltage potential, and a gate, the differentially coupled transistor pair being arranged such that a first and second input signals are respectively received by the gates of the transistors, and each transistor body of the differentially coupled transistor pair being coupled to a different body effect voltage potential; and an output port coupled to one of the drains of the transistor pair.

Claim 23

The voltage comparator circuit of claim 18, wherein the body of one of the transistors of the differentially coupled transistor pair is coupled to a body effect voltage potential that is present at the source of the transistor and the body of the other transistor of the differentially coupled transistor pair is coupled to a different body effect voltage potential.

Claim 24

The circuit of claim 18, wherein the transistors comprise at least one N-channel MOS transistor.

Claim 25

The circuit of claim 18, wherein the transistors comprise at least one P-channel MOS transistor.

Claim 26

The circuit of claim 18, wherein the loading network comprises at least two transistors in a current mirror configuration, thereby providing an active load for the transistors that are in a differential pair configuration.

Claim 27

The circuit of claim 18, wherein the biasing network comprises at least one biasing transistor having its drain electrically coupled to the differentially coupled transistor pair sources, thereby providing a biasing current for the differential pair, the baising transistor further comprising a biasing transistor source that is electrically coupled to a reference voltage potential, a biasing transistor gate that is electrically coupled to a biasing voltage potential, and a biasing transistor body that is coupled to a body effect voltage potential.

Claim 28

The circuit of claim 23, wherein the transistor body is coupled to a body effect voltage potential that is present at the source of the transistor.

Claim 29

A voltage comparator circuit, comprising: a biasing network for regulating a bias current; a loading network for regulating a load current; a first differential input for receiving a first input voltage potential; a first controllable electron valve constructed and arranged to have a first electron valve body that is electrically coupled to a first body effect voltage potential, the first controllable electron valve further comprising: a first electron valve source that is electrically coupled to the biasing network; a first electron valve drain that is electrially coupled to the loading network; and a first electron valve control gate that is electrically coupled to the first differential input; a second differential input for receiving a second input voltage potential; a second controllable electron valve constructed and arranged to have a second electron valve body that is electrically coupled to a second electron valve source having a voltage potential that is different than the first body effect voltage potential, the second controllable electron valve further comprising: the second electron valve source that is electrically coupled to the biasing network; a second electron valve drain that is electrically coupled to the loading network; and a second electron valve control gate that is electrically coupled to the second differential input; and a voltage compare output, electrically coupled to the first electron valve drain, for presenting an electrical signal representative of the compared differential input voltage potentials.

Claim 30

A voltage comparator circuit, comprising: a biasing network for regulating a bias current; a loading network for regulating a load current; a first differential input for receiving a first input voltage potential; a first controllable electron valve constructed and arranged to have a first electron valve body that is electrically coupled to a first body effect voltage potential, the first controllable electron valve further comprising: a first electron valve source that is electrically coupled to the biasing network; a first electron valve drain that is electrially coupled to the loading network; and a first electron valve control gate that is electrically coupled to the first differential input; a second differential input for receiving a second input voltage potential; a second controllable electron valve constructed and arranged to have a second electron valve body that is electrically coupled to a second electron valve source having a voltage potential that is different than the first body effect voltage potential, the second controllable electron valve further comprising: the second electron valve source that is electrically coupled to the biasing network; a second electron valve drain that is electrically coupled to the loading network; and a second electron valve control gate that is electrically coupled to the second differential input; and a voltage compare output, electrically coupled to the first electron valve drain, for presenting an electrical signal representative of the compared differential input voltage potentials.