Passive locating system

Claim 2

A locating system comprising: a receiver for generating digital time domain signal samples related to a signal source; a transform processor for generating digital frequency domain signal samples in response to the digital time domain signal samples generated by said receiver; an adder circuit for generating the digital summed frequency domain signal samples as pseudo noise digital summed frequency domain signal samples that are suitable for correlation processing by selectively adding the plurality of digital frequency domain signal samples from the array of digital frequency domain signal sampled generated by said transform processor; a time difference processor for generating time difference signal samples by processing the digital summed signal samples generated by said adder circuit, said time difference processor including a correlation processor for generating the time difference signal samples by correlation processing of the pseudo noise digital summed signal samples generated by said adder circuit; and a location processor for generating a location parameter defining location of a signal source in response to the time difference signal samples generated by said time difference processor.

Claim 3

The system as set forth in claim 1 above, wherein said transform processor includes a fast Fourier transform processor for generating the digital frequency domain signal samples as fast Fourier transformed digital frequency domain signal samples in response to the digital time domain signal samples generated by said receiver.

Claim 4

The system as set forth in claim 1 above, wherein said system is an underwater passive surveillance system, wherein said receiver includes an underwater acoustic transducer for generating a transducer signal and a transducer circuit for generating the digital time domain signal samples related to a signal source in response to the transducer signal generated by said underwater acoustic transducer.

Claim 5

The system as set forth in claim 1 above, wherein said location processor is arranged for generating the location parameter as a range parameter defining range location of a signal source in response to the time difference signal samples generated by said time difference processor.

Claim 6

The system as set forth in claim 1 above, further comprising a selection circuit for selecting the plurality of digital frequency domain signal samples generated by said transform processor that are selectively added by said adder circuit for generating digital summed frequency domain signal samples.

Claim 7

A locating system comprising: a receiver for generating digital time domain signal samples related to a signal source; a transform processor for generating digital frequency domain signal samples in response to the digital time domain signal samples generated by said receiver; an adder circuit for generating the digital summed frequency domain signal samples as pseudo noise digital summed frequency domain signal samples that are suitable for correlation processing by selectively adding the plurality of digital frequency domain signal samples from the array of digital frequency domain signal sampled generated by said transform processor; a time difference processor for generating time difference signal samples by processing the digital summed signal samples generated by said adder circuit, said time difference processor including a correlation processor for generating the time difference signal samples by correlation processing of the pseudo noise digital summed signal samples generated by said adder circuit; a location processor for generating a location parameter defining location of a signal source in response to the time difference signal samples generated by said time difference processor; and an operator keyboard selection circuit for operator selection of the plurality of digital frequency domain signal samples generated by said transform processor that are selectively added by said adder circuit for generating digital summed frequency domain signal samples.

Claim 8

A locating system comprising: a receiver for generating digital time domain signal samples related to a signal source; a transform processor for generating digital frequency domain signal samples in response to the digital time domain signal samples generated by said receiver; an adder circuit for generating the digital summed frequency domain signal samples as pseudo noise digital summed frequency domain signal samples that are suitable for correlation processing by selectively adding the plurality of digital frequency domain signal samples from the array of digital frequency domain signal sampled generated by said transform processor; a time difference processor for generating time difference signal samples by processing the digital summed signal samples generated by said adder circuit, said time difference processor including a correlation processor for generating the time difference signal samples by correlation processing of the pseudo noise digital summed signal samples generated by said adder circuit; a location processor for generating a location parameter defining location of a signal source in response to the time difference signal samples generated by said time difference processor; and an operator keyboard selection circuit for operator selection of the plurality of digital frequency domain signal samples generated by said transform processor that are selectively added by said adder circuit for generating digital summed frequency domain signal samples.

Claim 9

A locating system comprising: a receiver for generating digital time domain signal samples related to a signal source; a transform processor for generating digital frequency domain signal samples in response to the digital time domain signal samples generated by said receiver; an adder circuit for generating digital summed frequency domain signal samples by selectively adding a plurality of digital frequency domain signal samples generated by said transform processor; a correlation processor for generating correlated signal samples by correlating the digital summed signal samples generated by said adder circuit; and a location processor for generating a location parameter defining location of a signal source in response to the correlated signal samples generated by said correlation processor.

Claim 10

A locating system comprising: a receiver for generating digital time domain signal samples related to a signal source; a transform processor for generating digital frequency domain signal samples in response to the digital time domain signal samples generated by said receiver; an adder circuit for generating digital summed frequency domain signal samples by selectively adding a plurality of digital frequency domain signal samples generated by said transform processor; a correlation processor for generating correlated signal samples by correlating the digital summed signal samples generated by said adder circuit; and a location processor for generating a location parameter defining location of a signal source in response to the correlated signal samples generated by said correlation processor.

Claim 11

The system as set forth in claim 7 above, wherein said location processor is arranged for generating the location parameter as a range parameter defining range location of a signal source in response to the correlated signal samples generated by said correlation processor.

Claim 12

The system as set forth in claim 7 above, wherein said adder circuit is arranged for generating the digital summed frequency domain signal samples as pseudo noise digital summed frequency domain signal samples that are suitable for correlation processing by selectively adding the plurality of digital frequency domain signal samples from the digital frequency domain signal samples generated by said transform processor and wherein said correlation processor is arranged for for generating the correlated signal samples by processing the pseudo noise digital summed signal samples generated by said adder circuit.

Claim 13

The system as set forth in claim 7 above, further comprising an operator keyboard circuit for operator selection of the plurality of digital frequency domain signal samples from the digital frequency domain signal samples generated by said transform processor that are selectively adding by said adder circuit.

Claim 14

The system as set forth in claim 7 above, further comprising an artificial intelligence processor for automatically selecting the plurality of digital frequency domain signal samples from the digital frequency domain signal samples generated by said transform processor that are selectively adding by said adder circuit.

Claim 15

A locating system comprising: a receiver for generating digital time domain signal samples related to a signal source; a transform processor for generating digital frequency domain signal samples in response to the digital time domain signal samples generated by said receiver; an adder circuit for generating pseudo noise signal samples that are suitable for correlation processing by selectively adding a plurality of digital frequency domain signal samples generated by said transform processor; a correlation processor for generating correlated signal samples by correlating the pseudo noise signal samples generated by said adder circuit; and a location processor for generating a location parameter defining location of a signal source in response to the correlated signal samples generated by said correlation processor.

Claim 16

A locating system comprising: a receiver for generating digital time domain signal samples related to a signal source; a transform processor for generating digital frequency domain signal samples in response to the digital time domain signal samples generated by said receiver; an adder circuit for generating pseudo noise signal samples that are suitable for correlation processing by selectively adding a plurality of digital frequency domain signal samples generated by said transform processor; a correlation processor for generating correlated signal samples by correlating the pseudo noise signal samples generated by said adder circuit; and a location processor for generating a location parameter defining location of a signal source in response to the correlated signal samples generated by said correlation processor.

Claim 17

The system as set forth in claim 12 above, wherein said location processor is arranged for generating the location parameter as a range parameter defining range location of a signal source in response to the correlated signal samples generated by said correlation processor.

Claim 18

The system as set forth in claim 12 above, further comprising a selection circuit for selecting the plurality of digital frequency domain signal samples from the digital frequency domain signal samples generated by said transform processor.

Claim 19

The system as set forth in claim 12 above, further comprising an inference processor for selecting the plurality of digital frequency domain signal samples from the digital frequency domain signal samples generated by said transform processor.

Claim 20

A locating system comprising: a receiver for generating an array of digital time domain signal samples related to a signal source; a transform processor for generating an array of digital frequency domain signal samples in response to the array of digital time domain signal samples generated by said receiver; a selection circuit for selecting a plurality of frequency signal samples from the array of digital frequency domain signal samples generated by said transform processor; an adder circuit for generating summed signal samples by adding the plurality of frequency signal samples selected by said selection circuit; a correlation processor for generating correlated signal samples by correlating the summed signal samples generated by said adder circuit; a peak detector circuit for generating a time parameter defining the time relation of a peak of the correlated signal samples generated by said correlation processor; and a location processor for generating a location parameter defining location of a signal source in response to the time parameter generated by said peak detector circuit.

Claim 21

A locating system comprising: a receiver for generating an array of digital time domain signal samples related to a signal source; a transform processor for generating an array of digital frequency domain signal samples in response to the array of digital time domain signal samples generated by said receiver; a selection circuit for selecting a plurality of frequency signal samples from the array of digital frequency domain signal samples generated by said transform processor; an adder circuit for generating summed signal samples by adding the plurality of frequency signal samples selected by said selection circuit; a correlation processor for generating correlated signal samples by correlating the summed signal samples generated by said adder circuit; a peak detector circuit for generating a time parameter defining the time relation of a peak of the correlated signal samples generated by said correlation processor; and a location processor for generating a location parameter defining location of a signal source in response to the time parameter generated by said peak detector circuit.

Claim 22

The system as set forth in claim 16 above; wherein said system is an underwater passive surveillance system, wherein said receiver includes an underwater analog transducer for generating an analog transducer signal, an amplifier for amplifying the analog transducer signal generated by said analog transducer, and an analog to digital converter for generating the digital time domain signal samples related to a signal source in response to the analog transducer signal amplified by said amplifier; wherein said transform processor includes a fast Fourier transform processor for generating the array of digital frequency domain signal samples as an array of Fourier transformed digital frequency domain signal samples in response to the array of digital time domain signal samples generated by said receiver; wherein said selection circuit includes an operator input device for operator selecting of the plurality of frequency signal samples from the array of Fourier transformed digital frequency domain signal samples generated by said fast Fourier transform processor; wherein said adder circuit is implemented on a digital signal processor chip for generating the summed signal samples as pseudo noise summed signal samples that are suitable for correlation processing by adding the plurality of frequency signal samples selected by said operator input device in said selection circuit; wherein said correlation processor includes a digital signal processor chip for generating the correlated signal samples by convolution processing of the pseudo noise summed signal samples generated by said adder circuit; wherein said peak detector circuit is arranged for generating the time parameter as a time difference parameter defining the time relation of a peak of the correlated signal samples generated by said correlation processor as a time difference between difference propagation paths; and wherein said location processor is programmed for generating the location parameter defining location as a range of a signal source in response to the time difference parameter generated by said peak detector circuit.

Claim 23

The system as set forth in claim 16 above, wherein said adder circuit is arranged for generating the summed signal samples as pseudo noise summed signal samples that are suitable for correlation processing by adding the plurality of frequency signal samples selected by said selection circuit and wherein said correlation processor is arranged for generating the correlated signal samples by correlating the pseudo noise summed signal samples generated by said adder circuit.

Claim 24

The system as set forth in claim 16 above, wherein said selection circuit includes an operator keyboard circuit for operator selection of the plurality of frequency signal samples from the array of digital frequency domain signal samples generated by said transform processor.

Claim 25

The system as set forth in claim 16 above, wherein said selection circuit includes an inference processor for selecting the plurality of frequency signal samples from the array of digital frequency domain signal samples generated by said transform processor.