US5091702A
Expired / Lapsed
US
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Automatic sweep-to-lock circuit for a phase-locked loop
Assignee: Magnavox Government and Industrial Electronics Co
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Filing: 1990-12-21
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Granted: 1992-02-25
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Expires: 2010-12-21
Abstract
Abstract A method for a phase-locked loop, which circuit includes, in a preferred embodiment, a resistor to unbalance phase detector outputs to an operational amplifier to cause the voltage output of the operational amplifier to sweep and thus cause the frequency output of a voltage controlled oscillator to sweep. Simple circuitry detects correct lock and terminates sweeping; or, if lock is not achieved, causes the output of the operational amplifier to remain at a low level until the operational amplifier is reset and then permits resweep. Very little auxiliary circuitry is required.
Inventors
- 👤 John D. Foell
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-03 01:18
CPC Classifications
H; H03; H03L; H03L7/00; H03L7/06; H03L7/08; H03L7/085; H03L7/095; H03L7/10; H03L7/12; Y; Y10; Y10S; Y10S331/00; Y10S331/02
Claims Analysis
Total Claims: 11
Claim 1
Independent Claim
170 words
A sweep-to-lock circuit for a phase-locked loop having a voltage controlled oscillator and a phase detector, the sweep-to-lock circuit comprising: (a) first circuit means connected to receive an input voltage from the phase detector and to provide a sweeping output voltage to the voltage controlled oscillator; (b) second circuit means to cause a given condition of said input voltage; (c) third circuit means to determine when a desired value of said output voltage has been exceeded and to cause said output voltage to drop to a reset level in response thereto; and (d) fourth circuit means to prevent, for a selected interval of time, said first circuit means from providing a subsequent sweep, thereby to assure that said reset value is reached before said subsequent sweep is begun (e) the value of said output voltage sweeping in a selected direction from the reset value to a maximum value in response to the given condition of said input voltage, thereby causing the frequency output of said voltage controlled oscillator to sweep.
Claim 2
Dependent Claim
170 words
A sweep-to-lock circuit for a phase-locked loop having a voltage controlled oscillator and a phase detector, the sweep-to-lock circuit comprising: (a) first circuit means connected to receive an input voltage from the phase detector and to provide a sweeping output voltage to the voltage controlled oscillator; (b) second circuit means to cause a given condition of said input voltage; (c) third circuit means to determine when a desired value of said output voltage has been exceeded and to cause said output voltage to drop to a reset level in response thereto; and (d) fourth circuit means to prevent, for a selected interval of time, said first circuit means from providing a subsequent sweep, thereby to assure that said reset value is reached before said subsequent sweep is begun (e) the value of said output voltage sweeping in a selected direction from the reset value to a maximum value in response to the given condition of said input voltage, thereby causing the frequency output of said voltage controlled oscillator to sweep.
Claim 3
Dependent Claim
17 words
A sweep-to-lock circuit, as defined in claim 1, wherein said first circuit means comprises an operational amplifier.
Claim 4
Dependent Claim
29 words
A sweep-to-lock circuit, as defined in claim 2, wherein said second circuit means includes means to unbalance the inputs to said operational amplifier to initiate said output voltage sweeping.
Claim 5
Dependent Claim
61 words
A sweep-to-lock circuit, as defined in claim 1, wherein said third circuit means comprises a comparator having inputs connected to the output of said first circuit means and to a reference voltage, the output of said comparator providing a signal to said first circuit means to cause said output voltage of said first circuit means to drop to said reset level.
Claim 6
Dependent Claim
27 words
A sweep-to-lock circuit, as defined in claim 4, wherein said output of said comparator switches on switch means to provide said signal to said first circuit means.
Claim 7
Dependent Claim
35 words
A sweep-to-lock circuit, as defined in claim 5, further comprising said fourth circuit means disposed between said comparator and said switch means to keep said switch means switched on for said selected interval of time.
Claim 8
Dependent Claim
31 words
A sweep-to-lock circuit, as defined in claim 3, wherein said second circuit means further causes iterations of said output sweeping to continue until proper lock is attained, while avoiding false locks.
Claim 9
Independent Claim
133 words
A method of sweeping a phase-locked loop to lock, comprising: (a) receiving an input voltage from a phase detector and providing an output voltage to a voltage controlled oscillator, the value of said output voltage sweeping in a selected direction from a reset value to a maximum value in response to a given condition of said input voltage, thereby causing the frequency output of said voltage controlled oscillator to sweep; (b) causing said given condition; (c) determining when a desired value of said output voltage has been exceed and causing said output voltage to drop to said reset level in response thereto; and (d) preventing, for a selected interval of time, a subsequent sweep of said output voltage, thereby to assure that said reset value is reached before said subsequent sweep is begun.
Claim 10
Independent Claim
133 words
A method of sweeping a phase-locked loop to lock, comprising: (a) receiving an input voltage from a phase detector and providing an output voltage to a voltage controlled oscillator, the value of said output voltage sweeping in a selected direction from a reset value to a maximum value in response to a given condition of said input voltage, thereby causing the frequency output of said voltage controlled oscillator to sweep; (b) causing said given condition; (c) determining when a desired value of said output voltage has been exceed and causing said output voltage to drop to said reset level in response thereto; and (d) preventing, for a selected interval of time, a subsequent sweep of said output voltage, thereby to assure that said reset value is reached before said subsequent sweep is begun.
Claim 11
Dependent Claim
25 words
A method, as defined in claim 8, further causing iterations of said output sweeping to continue until proper lock is attained, while avoiding false locks.
References Cited (Backward Citations)
US4240076A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1995-02-24 | 1995-08-26 | 1996-02-25 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1999-02-24 | 1999-08-26 | 2000-02-25 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2003-02-24 | 2003-08-26 | 2004-02-25 | $7700.00 | Window Closed / Lapsed |