US5087898A
Expired / Lapsed
US
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Integrated semiconductor active isolator circuit
Assignee: US Philips Corp
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Filing: 1991-02-28
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Granted: 1992-02-11
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Expires: 2011-02-28
Abstract
Abstract An integrated semiconductor active isolator circuit which includes a negative feedback amplifier having an active semiconductor amplifier element. The control terminal of the semiconductor amplifying element defines the output of the isolator circuit and a principal conduction electrode of the semiconductor amplifying element defines an input of the isolator circuit.
Inventors
- 👤 Ramesh Pyndiah
- 👤 Francis van den Bogaart
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-08 11:38
CPC Classifications
H; H03; H03H; H03H11/00; H03H11/46; H03H11/52; H01; H01P; H01P1/00; H01P1/32; H01P1/38
Claims Analysis
Total Claims: 19
Claim 1
Independent Claim
77 words
An integrated semiconductor isolator circuit comprising: a negative feedback amplifier comprised of an active semiconductor amplifying element having a pair of principal conduction electrodes and a control electrode, one of said conduction electrodes comprising an input of said isolator circuit and said control electrode being coupled to an output of said isolator circuit, and a negative feedback circuit connected between said control electrode and said one of said conduction electrodes comprising said input of said isolator circuit.
Claim 2
Dependent Claim
77 words
An integrated semiconductor isolator circuit comprising: a negative feedback amplifier comprised of an active semiconductor amplifying element having a pair of principal conduction electrodes and a control electrode, one of said conduction electrodes comprising an input of said isolator circuit and said control electrode being coupled to an output of said isolator circuit, and a negative feedback circuit connected between said control electrode and said one of said conduction electrodes comprising said input of said isolator circuit.
Claim 3
Dependent Claim
47 words
An isolator circuit as claimed in claim 1, characterized in that said active semiconductor element comprises a common-source field effect transistor whose drain receives the input signal and whose gate produces the output signal, and said negative feedback circuit is connected between the gate and the drain.
Claim 4
Dependent Claim
28 words
An isolator circuit as claimed in claim 2, comprising means for presenting a reverse-sense zero gain and an impedance equal to a given reference impedance R 0 .
Claim 5
Dependent Claim
45 words
An isolator circuit as claimed in claim 3, characterized in that the conductance g R of the negative feedback circuit and the transconductance g m of the field effect transistor are selected to be equal, so that said feedback amplifier presents a reverse-sense zero gain.
Claim 6
Dependent Claim
65 words
An isolator circuit as claimed in claim 4, characterized in that the characteristic features of the field effect transistor are chosen such that the sum of its transconductance g m and its drain conductance g D is equal to the inverse value of the given impedance R 0 , so that said feedback amplifier presents an impedance equal to a given impedance R 0 .
Claim 7
Dependent Claim
24 words
An isolator circuit as claimed in claim 5, characterized in that the negative feedback circuit is a branch comprising a resistor R F .
Claim 8
Dependent Claim
66 words
An isolator circuit as claimed in claim 6, wherein, for compensating at high frequencies for the delays caused by the transit times of the electrons under the gate and caused by the time constants produced by the access and intrinsic resistances of the transistor and gate-source capacitance, the negative feedback branch further comprises a line L F connected in series with the resistor R F .
Claim 9
Dependent Claim
55 words
An isolator circuit as claimed in claim 4 wherein in order to render the value of the transconductance g m of the transistor adjustable, and to compensate for the effects of the dispersions of its characteristic features due to technology, the gate of the transistor is provided with gate bias means for biasing the gate.
Claim 10
Dependent Claim
33 words
An isolator circuit as claimed in claim 8, characterized in that the gate bias means have a negative d.c. bias voltage V G1 applied to the gate through a resistor R P1 .
Claim 11
Dependent Claim
22 words
An isolator circuit as claimed in claim 2, further comprising an active load connected to the drain of the field effect transistor.
Claim 12
Dependent Claim
64 words
An isolator circuit as claimed in claim 10, wherein the active load comprises a second field effect transistor whose source is connected to the drain of the first mentioned field effect transistor, whose drain is connected for receiving a d.c. supply voltage V DD and whose gate is connected for receiving a positive d.c. bias voltage V G2 through a resistor R P2 .
Claim 13
Dependent Claim
23 words
An isolator circuit as claimed in claim 11, characterized in that it is fabricated with a technology using compound III-V field effect transistors.
Claim 14
Dependent Claim
44 words
An isolator circuit as claimed in claim 12, characterized in that the first and second transistors are gallium arsenide MESFETs having two gate fingers, the gate length l G being equivalent to 0.5 μm, the gate width W G being equivalent to 100 μm.
Claim 15
Dependent Claim
57 words
An isolator circuit as claimed in claim 13, characterized in that the negative feedback branch comprises a resistor R F whose resistance is about 60 Ω, in that a line connected in series with this resistor is a microstrip line having a characteristic impedance of approximately 100 Ω corresponding to an inductive impedance of approximately 0.5 nH.
Claim 16
Dependent Claim
76 words
An isolator circuit as claimed in claim 14, further comprising means for applying the negative bias voltage V G1 =-0.5 V, the positive bias voltage V G2 =+2.5 V, and the d.c. supply voltage V DD =4 V, and wherein a bias resistor R P1 is provided for applying voltage V G1 and a bias resistor R P2 is provided for applying voltage V G2 , each of said bias resistors being equal to 10 kΩ.
Claim 17
Dependent Claim
40 words
An isolator circuit as claimed in claim 15, characterized in that a decoupling capacitor C 1 is inserted between the end of a the bias resistor R P1 and the output ST at a junction of the negative feedback branch.
Claim 18
Dependent Claim
23 words
An isolator circuit as claimed in claim 11, characterized in that it is realized with a technology using MOSFET silicon field effect transistors.
Claim 19
Dependent Claim
25 words
An isolator circuit as claimed in claim 11, further comprising a capacitor connected between the gate and the source of said second field effect transistor.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1995-02-10 | 1995-08-12 | 1996-02-11 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1999-02-10 | 1999-08-12 | 2000-02-11 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2003-02-10 | 2003-08-12 | 2004-02-11 | $7700.00 | Window Closed / Lapsed |