US5079612A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Semiconductor integrated circuit device
Assignee: Toshiba Corp
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Filing: 1990-08-09
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Granted: 1992-01-07
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Expires: 2010-08-09
Abstract
Abstract A semiconductor IC device including a main circuit block and at least one subcircuit block, each having a ground terminal, a supply voltage terminal and an input or output terminal. A first ground line is connected to the ground terminal of the main circuit block and arranged within a wiring domain of the main circuit block and adjacent to the subcircuit blocks. A second ground line is connected to the ground terminal of the subcircuit block and arranged within a wiring domain of the subcircuit block and adjacent to the main circuit block. Protective elements are connected between the first and second ground lines so as to form short circuits through at least one of the first and second ground lines. In the IC device thus configured, all of the input and output terminals resist overvoltage, in every case where any one of the ground terminals and the supply voltage terminals is determined as a reference potential terminal, without complicating the protective element wiring arrangement or increasing the chip area and the cost thereof.
Inventors
- 👤 Hiroshi Takamoto
- 👤 Makoto Segawa
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-30 18:52
CPC Classifications
H; H10; H10D; H10D89/00; H10D89/60
Claims Analysis
Total Claims: 6
Claim 1
Independent Claim
180 words
A semiconductor integrated circuit device provided with a main circuit block and at least one subcircuit block, each having a ground terminal, a supply voltage terminal and an input or output terminal, protective elements being connected between the supply voltage terminal, the output or input terminal and the ground terminal for said main circuit block and for each subcircuit block, respectively to short overcurrent for circuit protection when overvoltage is applied to each terminal, said device comprising: (a) a first ground line connected to the ground terminal of the main circuit block having a major chip area and arranged within a wiring domain of the main circuit block and adjacent to the subcircuit block; (b) a second ground line connected to the ground terminal of the subcircuit block and arranged within a wiring domain of the subcircuit block and adjacent to the main circuit block; and (c) at least one of said protective elements connected between said first and second ground lines so as to form a short circuit through at least one of said first and second ground lines.
Claim 2
Dependent Claim
180 words
A semiconductor integrated circuit device provided with a main circuit block and at least one subcircuit block, each having a ground terminal, a supply voltage terminal and an input or output terminal, protective elements being connected between the supply voltage terminal, the output or input terminal and the ground terminal for said main circuit block and for each subcircuit block, respectively to short overcurrent for circuit protection when overvoltage is applied to each terminal, said device comprising: (a) a first ground line connected to the ground terminal of the main circuit block having a major chip area and arranged within a wiring domain of the main circuit block and adjacent to the subcircuit block; (b) a second ground line connected to the ground terminal of the subcircuit block and arranged within a wiring domain of the subcircuit block and adjacent to the main circuit block; and (c) at least one of said protective elements connected between said first and second ground lines so as to form a short circuit through at least one of said first and second ground lines.
Claim 3
Dependent Claim
68 words
The semiconductor integrated circuit device of claim 1, which further comprises: (a) a supply voltage line connected to the supply voltage terminal of the main circuit block and arranged within said wiring domain of the main circuit block and adjacent to said first ground line; and (b) at least two protective elements connected between the supply voltage line and said first ground line and arranged at regular intervals.
Claim 4
Dependent Claim
35 words
The semiconductor integrated circuit device of claim 2, wherein said protective elements are bipolar transistors, each of which has a well formed in a semiconductor substrate or on a semiconductor substrate surface as a base.
Claim 5
Dependent Claim
50 words
The semiconductor integrated circuit device of claim 2, wherein said protective elements are MOS/field effect transistors, each of which having impurity diffusion layers on both sides of a gate oxide film and a gate electrode arranged on a well formed in a semiconductor substrate or on a semiconductor substrate surface.
Claim 6
Dependent Claim
54 words
The semiconductor integrated circuit device of claim 2, wherein said protective elements are MOS/field effect transistors, each one of which having impurity diffusion layers on both sides of a field oxide film and an aluminum or polycrystal silicon electrode arranged on a well formed in a semiconductor substrate or on a semiconductor substrate surface.
References Cited (Backward Citations)
US4990802A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1995-01-06 | 1995-07-08 | 1996-01-07 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1999-01-06 | 1999-07-08 | 2000-01-07 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2003-01-06 | 2003-07-08 | 2004-01-07 | $7700.00 | Window Closed / Lapsed |