Multilayer printed circuit board formation

Claim 1

A process for forming a multilayer printed circuit board containing conductive through-holes which make electrical connections to a series of electrically conducting layers through several insulating layers comprising the steps of: (a) forming electrically conductive copper circuitry on a surface of a dielectric layer support with the circuitry having a thickness of at least 4 microns; (b) forming on the copper circuitry a layer of an oxide, hydroxide or combination thereof of tin by application of tin to the copper circuitry whereby during application or subsequent thereto the applied tin is converted on its surface to the oxide, hydroxide or combination thereof with the proviso that the layer of oxide, hydroxide or combination is not greater than 1.5 mils in thickness; (c) applying a silane bonding mixture to the surface of the oxide, hydroxide or combination thereof formed in step (b) or an insulating layer to be bonded to the copper circuitry to form an adherent organosilane coating thereon, the insulating layer comprising a partially cured thermosetting polymer composition and the silane bonding mixture consisting essentially of: (I) a ureido silane having the structure ##STR7## wherein A is an alkylene having 1 to 8 carbon atoms, B is a hydroxy or an alkoxy having 1 to 8 carbon atoms and n is an integer of 1, 2, or 3 with the proviso that if n is 1 or 2, each B need not be identical; and (II) a disylyl crosslinking agent having the structure ##STR8## wherein R 1 , R 2 , R 3 , R 4 , R 5 and R 6 independently of the other is an alkyl with 1 to 8 carbon atoms and where R denotes an alkylene group having 1 to 8 carbon atoms; (d) repeating steps (a), (b) and (c); (e) bonding materials formed by steps (a), (b), (c) and (d) into a single article whereby an organosilane coating is between a layer of the oxide, hydroxide or combination and an insulating layer whereby during bonding the partially cured insulating layer is cured; (f) forming a number of holes through the bonded article formed in step (e); (g) metallizing walls of the through-hole to form electrically conductive paths from opposite openings of the through-hole to form a multilayer circuit board with the proviso that the multilayer printed circuit board will not delaminate upon exposure to thermal stress at 550° F. for 10 seconds after baking at 250° F. for 6 hours and then pre-conditioning at 85° C. and 85% relative humidity for twenty-four (24) hours.